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    Reading circuit for a resistive memory cell
    1.
    发明授权
    Reading circuit for a resistive memory cell 有权
    电阻式存储单元的读取电路

    公开(公告)号：US08867260B2

    公开(公告)日：2014-10-21

    申请号：US13869146

    申请日：2013-04-24

    Applicant: Agency for Science, Technology and Research

    Inventor： Kejie Huang ,  Ning Ning

    IPC: G11C11/00 ,  G11C13/00

    CPC classification number: G11C13/004 ,  G11C13/0002

    Abstract: A reading circuit for a resistive memory cell is provided, the circuit including a current source, a precharge switch, a comparator circuit including a first input node (in-node), and a second in-node, the precharge switch configured to couple the current source to the first in-node to apply a precharge voltage during a first reading time period, and to decouple the current source during a second reading time period, the comparator circuit configured to operate during a third reading time period, a memory cell access switch to enable a current flow at least partially during the second and the third reading time periods through a memory cell, the comparator circuit configured to compare a voltage at the first in-node with a reference voltage at the second in-node and to determine a programming state of the memory cell based on the voltage at the first in-node during the third reading time period.

    Abstract translation: 提供了一种用于电阻式存储单元的读取电路，该电路包括电流源，预充电开关，包括第一输入节点（节点内）和第二节点内的比较器电路，所述预充电开关被配置为将 电流源到第一节点内以在第一读取时间段期间施加预充电电压，并且在第二读取时间段期间对电流源解耦，所述比较器电路被配置为在第三读取时间段期间操作存储器单元访问 切换以在第二和第三读取时间段期间至少部分地通过存储器单元实现电流，比较器电路被配置为将第一节点处的电压与第二节点内的参考电压进行比较，并且确定 基于在第三读取时段期间的第一节点处的电压的存储器单元的编程状态。

    Write control circuits and write control methods
    2.
    发明授权
    Write control circuits and write control methods 有权
    写控制电路和写控制方式

    公开(公告)号：US09257177B2

    公开(公告)日：2016-02-09

    申请号：US14184645

    申请日：2014-02-19

    Applicant: Agency for Science, Technology and Research

    Inventor： Huey Chian Foong ,  Kejie Huang

    IPC: G11C7/00 ,  G11C13/00

    CPC classification number: G11C13/0069 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0064 ,  G11C2013/0066 ,  G11C2013/0078 ,  G11C2213/79

    Abstract: According to various embodiments, a write control circuit configured to control writing to a memory cell by applying a writing current to the memory cell may be provided. The write control circuit may include: a current application circuit configured to apply the writing current to the memory cell; a determination circuit configured to determine whether writing to the memory cell is finished; and a stop writing circuit configured to cut off the writing current from the memory cell if it is determined that writing to the memory cell is finished.

    Abstract translation: 根据各种实施例，可以提供一种写入控制电路，其被配置为通过向存储器单元施加写入电流来控制对存储器单元的写入。 写控制电路可以包括：当前应用电路，被配置为将写入电流施加到存储单元; 确定电路，被配置为确定对所述存储单元的写入是否结束; 以及停止写入电路，其被配置为如果确定对存储器单元的写入结束，则从存储器单元切断写入电流。

    WRITING CIRCUIT FOR A MAGNETORESISTIVE MEMORY CELL, MEMORY CELL ARRANGEMENT AND METHOD OF WRITING INTO A MAGNETORESISTIVE MEMORY CELL OF A MEMORY CELL ARRANGEMENT
    3.
    发明申请
    WRITING CIRCUIT FOR A MAGNETORESISTIVE MEMORY CELL, MEMORY CELL ARRANGEMENT AND METHOD OF WRITING INTO A MAGNETORESISTIVE MEMORY CELL OF A MEMORY CELL ARRANGEMENT 有权
    用于磁记忆体存储器单元的写入电路，存储单元布局和写入存储单元布局的磁记忆体存储器单元的方法

    公开(公告)号：US20130343116A1

    公开(公告)日：2013-12-26

    申请号：US13708868

    申请日：2012-12-07

    Applicant: Agency for Science, Technology and Research

    Inventor： Yan Hwee Sunny Lua ,  Kejie Huang

    IPC: G11C11/16

    CPC classification number: G11C11/1675 ,  G11C11/1653 ,  G11C11/1655 ,  G11C11/1673 ,  G11C11/5607

    Abstract: A writing circuit for a magnetoresistive memory cell is provided. The writing circuit includes a first electrical connecting terminal, a second electrical connecting terminal, a third electrical connecting terminal, a fourth electrical connecting terminal, a first reference potential terminal, a second reference potential terminal, a first switch configured to couple one of the first electrical connecting terminal, the second electrical connecting terminal, the third electrical connecting terminal and the fourth electrical connecting terminal to the magnetoresistive memory cell, and a second switch configured to couple the first reference potential terminal to the magnetoresistive memory cell if the first electrical connecting terminal or the second electrical connecting terminal is coupled to the magnetoresistive memory cell, and to couple the second reference potential terminal to the magnetoresistive memory cell if the third electrical connecting terminal or the fourth electrical connecting terminal is coupled to the magnetoresistive memory cell.

    Abstract translation: 提供了一种用于磁阻存储单元的写入电路。 写入电路包括第一电连接端子，第二电连接端子，第三电连接端子，第四电连接端子，第一参考电位端子，第二参考电位端子，第一开关，被配置为将第一电连接端子， 电连接端子，第二电连接端子，第三电连接端子和第四电连接端子连接到磁阻存储单元;以及第二开关，被配置为将第一参考电位端子耦合到磁阻存储单元，如果第一电连接端子 或者第二电连接端子耦合到磁阻存储器单元，并且如果第三电连接端子或第四电连接端子耦合到磁阻存储器单元，则将第二参考电位端子耦合到磁阻存储单元。

    READING CIRCUIT FOR A RESISTIVE MEMORY CELL
    4.
    发明申请
    READING CIRCUIT FOR A RESISTIVE MEMORY CELL 有权
    读电路用于电阻记忆体

    公开(公告)号：US20130279237A1

    公开(公告)日：2013-10-24

    申请号：US13869146

    申请日：2013-04-24

    Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH

    Inventor： Kejie Huang ,  Ning Ning

    IPC: G11C13/00

    CPC classification number: G11C13/004 ,  G11C13/0002

    Abstract: A reading circuit for a resistive memory cell is provided, the circuit including a current source, a precharge switch, a comparator circuit including a first input node (in-node), and a second in-node, the precharge switch configured to couple the current source to the first in-node to apply a precharge voltage during a first reading time period, and to decouple the current source during a second reading time period, the comparator circuit configured to operate during a third reading time period, a memory cell access switch to enable a current flow at least partially during the second and the third reading time periods through a memory cell, the comparator circuit configured to compare a voltage at the first in-node with a reference voltage at the second in-node and to determine a programming state of the memory cell based on the voltage at the first in-node during the third reading time period.

    Abstract translation: 提供了一种用于电阻式存储单元的读取电路，该电路包括电流源，预充电开关，包括第一输入节点（节点内）和第二节点内的比较器电路，所述预充电开关被配置为将 电流源到第一节点内以在第一读取时间段期间施加预充电电压，并且在第二读取时间段期间对电流源解耦，所述比较器电路被配置为在第三读取时间段期间操作存储器单元访问 切换以在第二和第三读取时间段期间至少部分地通过存储器单元实现电流，比较器电路被配置为将第一节点处的电压与第二节点内的参考电压进行比较，并且确定 基于在第三读取时段期间的第一节点处的电压的存储器单元的编程状态。

    Circuit arrangement and a method of writing states to a memory cell
    5.
    发明授权
    Circuit arrangement and a method of writing states to a memory cell 有权
    电路布置和将状态写入存储单元的方法

    公开(公告)号：US08942024B2

    公开(公告)日：2015-01-27

    申请号：US13707442

    申请日：2012-12-06

    Applicant: Agency for Science, Technology and Research

    Inventor： Kejie Huang

    IPC: G11C13/00

    CPC classification number: G11C13/0069 ,  G11C13/0064 ,  G11C13/0097 ,  G11C2013/0066 ,  G11C2013/0073 ,  G11C2213/79

    Abstract: A method of writing a first state or a second state to a memory cell may be provided. Writing the first state to the memory cell may include electrically connecting a first switch in electrical connection to a first end of the memory cell to a first voltage and electrically connecting a second switch in electrical connection to a second end of the memory cell to a fourth voltage to apply a first potential difference to cause formation of the first state in the memory cell. Writing the second state to the memory cell may include electrically connecting the first switch to the second voltage and electrically connecting the second switch to the third voltage to apply a second potential difference to cause formation of the second state in the memory cell.

    Abstract translation: 可以提供将第一状态或第二状态写入存储单元的方法。 将第一状态写入存储单元可以包括电连接到存储器单元的第一端的第一开关与第一电压电连接，并将电连接到存储单元的第二端的第二开关电连接到第四 电压以施加第一电位差以在存储器单元中形成第一状态。 将第二状态写入存储单元可以包括将第一开关电连接到第二电压并将第二开关电连接到第三电压以施加第二电位差，从而在存储单元中形成第二状态。

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