FIELD EXTENSION TO REDUCE NON-YIELDING EXPOSURES OF WAFER
    1.
    发明申请
    FIELD EXTENSION TO REDUCE NON-YIELDING EXPOSURES OF WAFER 审中-公开
    现场扩展减少无覆盖的无损检测

    公开(公告)号:US20120162622A1

    公开(公告)日:2012-06-28

    申请号:US12977918

    申请日:2010-12-23

    IPC分类号: G03B27/42 H01L29/06

    摘要: Techniques are provided for efficient lithography processing and wafer layout. In particular, the techniques can be used to reduce the number of sacrificial exposures along the wafer perimeter region. In one example embodiment, an exposure system reticle is configured with both a normal area (die yielding area) and a dumification area (non-yielding area at wafer perimeter), thereby allowing for lithographic processing in the non-yielding areas sufficient to facilitate successful processing in the adjacent die yielding areas, but without requiring additional sacrificial exposures. This reduction in sacrificial exposures translates to a significant improvement in fab capacity. The techniques can be implemented, for example, on any number of lithography tools having an adjustable reticle or reticle blind capability and in the context of any technology nodes, such as 95 nm and smaller. The lithography tool may produce wafers at a faster rate.

    摘要翻译: 提供了有效的光刻处理和晶片布局的技术。 特别地,可以使用这些技术来减少沿着晶片周边区域的牺牲暴露的数量。 在一个示例性实施例中,曝光系统掩模版被配置为具有正常区域(模具屈服区域)和倾倒区域(晶圆周边的非屈服区域),从而允许在非产生区域中的平版印刷处理足以促成成功 在相邻模具产生区域中进行加工,但不需要额外的牺牲暴露。 牺牲暴露的这种减少意味着工厂容量的显着提高。 这些技术可以例如在具有可调节掩模版或掩模版盲能力的任何数量的光刻工具上并且在诸如95nm或更小的任何技术节点的上下文中实现。 光刻工具可以以更快的速率生产晶片。