公开(公告)号：US20100264970A1

公开(公告)日：2010-10-21

申请号：US12770793

申请日：2010-04-30

申请人： Alma ANDERSON ,  Joseph RUTKOWSKI ,  Dave OEHLER

发明人： Alma ANDERSON ,  Joseph RUTKOWSKI ,  Dave OEHLER

IPC分类号： H03K5/01

CPC分类号： H03K17/166

摘要： Consistent with an example embodiment, an edge-rate control circuit arrangement (300) for an I2C bus application comprises a first circuit stage (10, M1, M3), responsive to a state transition of a received signal. A second circuit stage (310, 25, 20, 35, 45, M4, ESD) is responsive to the state transition of the received signal and includes drive circuitry (M4) that is activated in response to the state transition of the received signal in order to provide an edge-transition signal for an I2C bus, and regulation circuitry (310, R1, R2, M0, M2) adapted to control the drive circuit and regulate a transition rate for the edge-transition signal, the transition rate being greater than a transition rate of the received signal at the first circuit stage and greater than a minimum and less than a maximum transition rate designated for communication on the I2C bus.

摘要翻译： 与示例实施例一致，用于I2C总线应用的边沿速率控制电路装置（300）包括响应于接收信号的状态转换的第一电路级（10，M1，M3）。 第二电路级（310,25,20,35,45,4H，M4，ESD）响应于接收信号的状态转换，并且包括响应于接收信号的状态转变而被激活的驱动电路（M4） 为了为I2C总线提供边沿转换信号，以及调节电路（310，R1，R2，M0，M2），适用于控制驱动电路并调节边沿转换信号的转换速率，转换速率更大 比第一电路级的接收信号的转换速率高大于最小值，小于指定用于在I2C总线上进行通信的最大转换速率。