公开(公告)号：US20240186213A1

公开(公告)日：2024-06-06

申请号：US18076245

申请日：2022-12-06

申请人： Amkor Technology Singapore Holding Pte. Ltd.

发明人： Jae Jin REE ,  Sang Hyeon LEE ,  Yi Seul HAN ,  Geon Du GIM ,  Hun Jung LIM

IPC分类号： H01L23/367 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/373 ,  H01L25/16

CPC分类号： H01L23/3675 ,  H01L21/4882 ,  H01L21/563 ,  H01L23/3135 ,  H01L23/3735 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/165 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/1611 ,  H01L2924/1616 ,  H01L2924/1619 ,  H01L2924/16235 ,  H01L2924/16251 ,  H01L2924/16315

摘要： In one example, an electronic device includes a substrate and a cover structure. The cover structure includes an upper cover wall comprising an upper wall outer surface and an upper wall inner surface opposite to the upper wall outer surface, cover sidewalls extending from the upper wall inner surface and coupled to the substrate. The upper cover wall and the cover sidewalls define a cavity. A channel structure is in the upper cover wall extending inward from the upper wall inner surface. A first electronic component is coupled to the substrate within the cavity and a thermal interface material (TIM) is coupled to the upper wall inner surface and the first electronic component. A portion of the TIM is within the channel structure. Other examples and related methods are also disclosed herein.

公开(公告)号：US20240249986A1

公开(公告)日：2024-07-25

申请号：US18098833

申请日：2023-01-19

申请人： Amkor Technology Singapore Holding Pte. Ltd.

发明人： Jong Min BARK ,  Sang Hyoun LEE ,  Hun Jung LIM ,  Hyun Il MOON

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L21/683 ,  H01L23/538

CPC分类号： H01L23/3128 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/5389 ,  H01L2221/68327 ,  H01L2221/68345

摘要： In one example, an electronic device includes a substrate including a substrate upper side and a conductive structure comprising substrate upper terminals adjacent to the substrate upper side. Vertical interconnects are coupled to the substrate upper terminals. An encapsulant covers portions of the substrate and the vertical interconnects. The vertical interconnects are exposed from an upper side of the encapsulant. A redistribution structure is over the encapsulant and includes a redistribution structure upper side, a redistribution structure lower side, a redistribution dielectric structure, and a redistribution conductive structure. The redistribution structure includes redistribution upper terminals adjacent to the redistribution structure upper side and redistribution bottom terminals adjacent to the redistribution lower side. The redistribution bottom terminals are coupled to the vertical interconnects and the redistribution upper terminals. An electronic component is coupled to the redistribution upper terminals. Other examples and related methods are also disclosed herein.