公开(公告)号：US10389434B1

公开(公告)日：2019-08-20

申请号：US16181895

申请日：2018-11-06

Applicant: Analog Devices, Inc.

Inventor： Lawrence Getzin

IPC: H04B5/00 ,  H04B7/24

Abstract: Data isolators for providing isolation between two ports that enable dynamic communication are described. The dynamic communication may be achieved by varying a ratio of the data rate relative to a clock frequency of a clock signal. The data isolator may include a first circuit that transmits data across an isolation barrier when the clock signal is in a first state and a second circuit that transmits data across the isolation barrier when the clock signal is in a second state. The clock frequency may be variable and, as a result, change the duration of data transmissions in a given clock cycle. For example, the clock frequency may be reduced to increase the number of bits transmitted per clock cycle and, conversely, increased to reduce the number of bits transmitted per clock cycle. Thus, the number of bits transmitted per clock cycle may be adjusted to suit the situation.

公开(公告)号：US10659150B1

公开(公告)日：2020-05-19

申请号：US16532415

申请日：2019-08-05

Applicant: Analog Devices, Inc.

Inventor： Lawrence Getzin

IPC: H04L12/911 ,  H04B5/00 ,  H04L27/08 ,  H04B7/24

Abstract: Data isolators for providing isolation between two ports that enable dynamic communication are described. The dynamic communication may be achieved by varying a ratio of the data rate relative to a clock frequency of a clock signal. The data isolator may include a first circuit that transmits data across an isolation barrier when the clock signal is in a first state and a second circuit that transmits data across the isolation barrier when the clock signal is in a second state. The clock frequency may be variable and, as a result, change the duration of data transmissions in a given clock cycle. For example, the clock frequency may be reduced to increase the number of bits transmitted per clock cycle and, conversely, increased to reduce the number of bits transmitted per clock cycle. Thus, the number of bits transmitted per clock cycle may be adjusted to suit the situation.

公开(公告)号：US09768945B2

公开(公告)日：2017-09-19

申请号：US13784508

申请日：2013-03-04

Applicant: Analog Devices, Inc.

Inventor： Michael Mueck ,  Lawrence Getzin

IPC: H04L7/00 ,  H04Q9/00 ,  G08C25/00 ,  H04L25/02 ,  H01F19/08

CPC classification number: H04L7/0016 ,  G08C25/00 ,  H01F19/08 ,  H04L25/0264 ,  H04Q9/00 ,  H04Q2209/823 ,  H04Q2209/86

Abstract: Embodiments of the present invention may provide a system with a first and second circuit system separated by an electrical isolation barrier but provided in communication by at least one isolator device that bridges the isolation barrier. The first circuit system may include a communication system to transmit data across a common isolator device as a series of pulses, and the second circuit system may receive the series of pulses corresponding to the data. The second circuit system may include a detector coupled to the common isolator device to detect the received pulses, a oneshot to frame the received pulse(s), and a controller to reconstruct the data based on accumulated framed pulse(s). Therefore, noise induced spurious pulses outside the oneshot intervals may be ignored by the second circuit system providing improved noise immunity.