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公开(公告)号：US09768945B2
公开(公告)日：2017-09-19
申请号：US13784508
申请日：2013-03-04
Applicant: Analog Devices, Inc.
Inventor： Michael Mueck , Lawrence Getzin
CPC classification number: H04L7/0016 , G08C25/00 , H01F19/08 , H04L25/0264 , H04Q9/00 , H04Q2209/823 , H04Q2209/86
Abstract: Embodiments of the present invention may provide a system with a first and second circuit system separated by an electrical isolation barrier but provided in communication by at least one isolator device that bridges the isolation barrier. The first circuit system may include a communication system to transmit data across a common isolator device as a series of pulses, and the second circuit system may receive the series of pulses corresponding to the data. The second circuit system may include a detector coupled to the common isolator device to detect the received pulses, a oneshot to frame the received pulse(s), and a controller to reconstruct the data based on accumulated framed pulse(s). Therefore, noise induced spurious pulses outside the oneshot intervals may be ignored by the second circuit system providing improved noise immunity.
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公开(公告)号：US09882575B1
公开(公告)日：2018-01-30
申请号：US15293740
申请日：2016-10-14
Applicant: Analog Devices, Inc.
Inventor： Hongxing Li , Michael C. W. Coln , Michael Mueck
CPC classification number: H03M1/1023 , H03M1/1245 , H03M1/38 , H03M1/468 , H03M1/68
Abstract: An analog-to-digital converter (ADC) circuit including error correction circuitry for correcting offset drifts in an ADC, such as a successive approximation register (SAR) ADC. The offset drifts can be reduced, such as by sampling the offset following an analog-to-digital conversion and subsequently providing an error correction signal based on the sampled offset.
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公开(公告)号：US09608655B1
公开(公告)日：2017-03-28
申请号：US15170051
申请日：2016-06-01
Applicant: Analog Devices, Inc.
Inventor： Hongxing Li , Junhua Shen , Michael Mueck , Michael C. W. Coln
CPC classification number: H03M1/1009 , H03M1/0639 , H03M1/066 , H03M1/069 , H03M1/124 , H03M1/145 , H03M1/164 , H03M1/466
Abstract: An analog-to-digital converter (ADC) system can sample an input voltage for at least a first conversion into a first N1-bit digital value and to use the same input voltage sample for at least a second conversion into a second N2-bit digital value. A difference between a result of the first conversion and a result of the second conversion can be driven toward zero to adjust weights of one or more of the bits to calibrated values for use in one or more subsequent analog-to-digital conversions of subsequent samples of the input voltage. Shuffling, dithering, or the like can help ensure that at least a portion of the decision paths used in the second conversion are different from the decision paths used in the first conversion. Calibration can be performed in the background while the the ADC is converting in a normal mode of operation.
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Patent Agency Ranking
公开(公告)号：US09912343B1
公开(公告)日：2018-03-06
申请号：US15371864
申请日：2016-12-07
Applicant: Analog Devices, Inc.
Inventor： Hongxing Li , Michael Mueck , Michael C. W. Coln
CPC classification number: H03M1/1009 , H03M1/1004 , H03M1/1042 , H03M1/1052 , H03M1/1245 , H03M1/466
Abstract: Various techniques that can provide a capability to background calibrate ADC linearity error, e.g., due to capacitor mismatch drift and other parameter drift, during normal ADC operation in which analog-to-digital signal conversions are ongoing. A method can include grouping capacitors of an ADC into multiple clusters and calibrating under an arbitrary signal condition. To quickly converge the calibration result, the same arbitrary signal can be converted twice, and the capacitor(s) being calibrated can be modulated after first conversion. The difference between the results of the first and second conversions can contain the error information that can be used for calibration, and the signal component can be removed by this process. These techniques can provide improved linearity at 20-bit level and beyond.
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公开(公告)号：US10809792B2
公开(公告)日：2020-10-20
申请号：US16103963
申请日：2018-08-16
Applicant: Analog Devices, Inc.
Inventor： Michael C. W. Coln , Michael Mueck
IPC: H03M1/00 , G06F1/3287 , H03F3/45 , H03M1/12 , H03M1/38
Abstract: A signal acquisition or conditioning amplifier can be configured and controlled to use correlated doubling sampling (CDS) of a differential input signal, and a storage capacitor in a capacitive or other feedback network, a low power operational transconductance amplifier (OTA) capable of being powered down between CDS samplings, and which can be operated in a manner that provides good performance characteristics while still providing low or efficient power consumption. The amplifier and other signal processing circuitry can allow power to be scaled down, when less signal measurement throughput is needed, and to be scaled up, when more signal measurement throughput is needed. Such flexibility can help make the present approach useful for a wide range of signal acquisition and measurement applications. Precharging via buffer amplifiers can provide improved signal acquisition circuitry effective input impedance.
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公开(公告)号：US09972196B2
公开(公告)日：2018-05-15
申请号：US13670364
申请日：2012-11-06
Applicant: Analog Devices, Inc.
Inventor： Michael Mueck
CPC classification number: G08C15/00 , G08C15/06 , G08C17/06 , H04B5/00 , H04B5/0031 , H04B5/0037 , H04L25/0266 , H04Q9/00 , H04Q2209/883
Abstract: An isolator system is disclosed in which a pair of circuit systems is separated by an isolation barrier but engage in mutual communication by an isolator device that bridges the isolation barrier. A first circuit system may include a measurement system generating measurement data and status monitor generating status data. The first circuit system also may include a communication system that multiplexes the measurement data and the status data for transmission across a common isolator device. In this manner, the number of isolator devices may be reduced over conventional designs.
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公开(公告)号：US20200057484A1
公开(公告)日：2020-02-20
申请号：US16103963
申请日：2018-08-16
Applicant: Analog Devices, Inc.
Inventor： Michael C.W. Coln , Michael Mueck
Abstract: A signal acquisition or conditioning amplifier can be configured and controlled to use correlated doubling sampling (CDS) of a differential input signal, and a storage capacitor in a capacitive or other feedback network, a low power operational transconductance amplifier (OTA) capable of being powered down between CDS samplings, and which can be operated in a manner that provides good performance characteristics while still providing low or efficient power consumption. The amplifier and other signal processing circuitry can allow power to be scaled down, when less signal measurement throughput is needed, and to be scaled up, when more signal measurement throughput is needed. Such flexibility can help make the present approach useful for a wide range of signal acquisition and measurement applications. Precharging via buffer amplifiers can provide improved signal acquisition circuitry effective input impedance.
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公开(公告)号：US09583948B2
公开(公告)日：2017-02-28
申请号：US13662100
申请日：2012-10-26
Applicant: Analog Devices, Inc.
Inventor： Michael Mueck , Adam Glibbery
CPC classification number: H02J50/70 , H02J5/005 , H02J50/12 , H02M1/44 , H04L25/0266
Abstract: Embodiments of the present invention may provide a circuit. The circuit may include a primary side, a secondary side, and an isolated energy transfer device electrically isolating the primary side and the secondary side. The primary side may include a first energy storage device coupled to a power source, a control system coupled to the first energy storage device for power, a second energy storage device, and a coupling system, coupled to the control system, to selectively couple the second energy storage device to the power source in a first phase and to selectively couple the second energy storage device to the primary side of the isolated energy transfer device during a second phase.
Abstract translation: 本发明的实施例可以提供一种电路。 电路可以包括初级侧，次级侧和将初级侧和次级侧电隔离的隔离的能量传递装置。 初级侧可以包括耦合到电源的第一能量存储装置，耦合到用于电力的第一能量存储装置的控制系统，耦合到控制系统的第二能量存储装置和耦合系统，以选择性地耦合 第二能量存储装置在第一阶段中到所述电源，并且在第二阶段期间将所述第二能量存储装置选择性地耦合到所述隔离能量传递装置的初级侧。
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