公开(公告)号：US20150028499A1

公开(公告)日：2015-01-29

申请号：US13948408

申请日：2013-07-23

Applicant: Analog Devices, Inc.

Inventor： Christine H. Tsau ,  William David Sawyer ,  Thomas Kieran Nunan

IPC: H01L23/544

CPC classification number: H01L23/544 ,  H01L21/76898 ,  H01L21/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for forming an alignment feature for back side wafer processing in a wafer fabrication process involves forming a trench into but not entirely through a wafer from a top side of the wafer; forming a contrasting material on surfaces of the trench; and grinding a bottom side of the wafer to expose the trench using the handling wafer to handle the wafer during such grinding, wherein the contrasting material lining the exposed trench provides an alignment reference for precise alignment of the wafer for back side processing the wafer.

Abstract translation: 用于在晶片制造工艺中形成用于背面晶片处理的对准特征的方法包括从晶片的顶侧形成沟槽而不是完全穿过晶片; 在沟槽的表面上形成对比材料; 并且研磨晶片的底侧以在这种研磨期间使用处理晶片来暴露沟槽以处理晶片，其中衬底暴露的沟槽的对比材料提供对准基准，用于晶片的精确对准以便背面处理晶片。

公开(公告)号：US09105644B2

公开(公告)日：2015-08-11

申请号：US13948408

申请日：2013-07-23

Applicant: Analog Devices, Inc.

Inventor： Christine H. Tsau ,  William David Sawyer ,  Thomas Kieran Nunan

IPC: H01L21/76 ,  H01L23/544 ,  H01L21/768 ,  H01L21/78

CPC classification number: H01L23/544 ,  H01L21/76898 ,  H01L21/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for forming an alignment feature for back side wafer processing in a wafer fabrication process involves forming a trench into but not entirely through a wafer from a top side of the wafer; forming a contrasting material on surfaces of the trench; and grinding a bottom side of the wafer to expose the trench using the handling wafer to handle the wafer during such grinding, wherein the contrasting material lining the exposed trench provides an alignment reference for precise alignment of the wafer for back side processing the wafer.

Abstract translation: 用于在晶片制造工艺中形成用于背面晶片处理的对准特征的方法包括从晶片的顶侧形成沟槽而不是完全穿过晶片; 在沟槽的表面上形成对比材料; 并且研磨晶片的底侧以在这种研磨期间使用处理晶片来暴露沟槽以处理晶片，其中衬底暴露的沟槽的对比材料提供对准基准，用于晶片的精确对准以便背面处理晶片。