公开(公告)号：US07251464B2

公开(公告)日：2007-07-31

申请号：US10958091

申请日：2004-10-04

申请人： Andrew M. Khan ,  Christopher P. Thron ,  Curtis M. Williams ,  George F. Opas

发明人： Andrew M. Khan ,  Christopher P. Thron ,  Curtis M. Williams ,  George F. Opas

IPC分类号： H04B1/04

CPC分类号： H03F1/3247 ,  H03F2201/3233

摘要： A method and apparatus for predistortion training in an amplifier using predistortion is provided herein. Predistortion takes place by collecting a series of envelope errors and averaging the envelope errors for various amplitude regions. LUT values are modified based on a curve-fit to the average amplitude values for each amplitude region. By utilizing a curve-fitting technique, the pitfalls of modifying individual LUT coefficients is avoided. Particularly, because the errors are collected in relatively broad regions and then averaged, the importance of exact correlation between a measured error and a specific LUT entry is significantly lessened.

摘要翻译： 本文提供了一种使用预失真的放大器中预失真训练的方法和装置。 通过收集一系列包络误差并对各种幅度区域的包络误差进行平均，进行预失真。 基于与每个幅度区域的平均幅度值的曲线拟合来修改LUT值。 通过利用曲线拟合技术，可以避免修改各个LUT系数的缺陷。 特别是因为误差在相对较宽的区域中被收集，然后被平均化，所以测量误差和特定LUT条目之间的精确相关性的重要性显着降低。

公开(公告)号：US08149027B2

公开(公告)日：2012-04-03

申请号：US12166882

申请日：2008-07-02

申请人： Lawrence F. Cygan ,  Andrew M. Khan ,  Curtis M. Williams

发明人： Lawrence F. Cygan ,  Andrew M. Khan ,  Curtis M. Williams

IPC分类号： H03K3/00

CPC分类号： H03F3/2173

摘要： An H-bridge circuit formed from two sub-circuits coupled to each other by a load network across a respective load node of each of the sub-circuits. Each sub-circuit of the two sub-circuits comprises a depletion mode upper transistor with a second electrode coupled to a first electrode of a lower transistor. The load node of the sub-circuit is disposed between the second electrode of the upper transistor and the first electrode of a lower transistor. There is a first voltage supply node coupled to a first electrode of the upper transistor and a second voltage supply node is coupled to a second electrode of the lower transistor. An upper driver transistor selectively couples a gate electrode of the upper transistor to an upper drive voltage node, the upper driver transistor having a control electrode coupled to an upper switched voltage supply circuit. There is also a lower switched voltage supply circuit coupled to a gate electrode of the lower transistor and a voltage dependent non-linear resistor is coupled across the gate electrode and second electrode of the upper transistor. In use, when the lower transistor and upper driver transistor are in a non-conductive state a potential difference across the voltage dependent non-linear resistor is sufficiently small enough to control the upper transistor into a conductive state. Conversely, when the lower transistor and upper driver transistor are in a conductive state the potential difference across the voltage dependent non-linear resistor provides a negative bias to the gate electrode of the upper transistor that has a negative potential sufficient to control the upper transistor into a non-conductive state.

摘要翻译： 由两个子电路形成的H桥电路，两个子电路通过负载网络彼此耦合，跨越每个子电路的相应负载节点。 两个子电路的每个子电路包括耗尽型上部晶体管，其第二电极耦合到下部晶体管的第一电极。 子电路的负载节点设置在上部晶体管的第二电极和下部晶体管的第一电极之间。 存在耦合到上部晶体管的第一电极的第一电压供应节点和第二电压供应节点耦合到下部晶体管的第二电极。 上驱动晶体管将上晶体管的栅电极选择性地耦合到上驱动电压节点，上驱动晶体管具有耦合到上开关电压电路的控制电极。 还有一个耦合到下部晶体管的栅电极的较低开关电压电源电路，并且依赖于电压的非线性电阻器耦合在上部晶体管的栅电极和第二电极之间。 在使用中，当下晶体管和上驱动晶体管处于非导通状态时，电压相关非线性电阻器两端的电位差足够小以将上晶体管控制为导通状态。 相反，当下晶体管和上驱动晶体管处于导通状态时，电压相关非线性电阻器两端的电位差向上晶体管的栅极提供负偏压，该栅极具有足以控制上晶体管的负电位 非导电状态。

公开(公告)号：US20100001701A1

公开(公告)日：2010-01-07

申请号：US12166882

申请日：2008-07-02

申请人： Lawrence F. Cygan ,  Andrew M. Khan ,  Curtis M. Williams

发明人： Lawrence F. Cygan ,  Andrew M. Khan ,  Curtis M. Williams

IPC分类号： G05F1/00

CPC分类号： H03F3/2173

摘要： An H-bridge circuit formed from two sub-circuits coupled to each other by a load network across a respective load node of each of the sub-circuits. Each sub-circuit of the two sub-circuits comprises a depletion mode upper transistor with a second electrode coupled to a first electrode of a lower transistor. The load node of the sub-circuit is disposed between the second electrode of the upper transistor and the first electrode of a lower transistor. There is a first voltage supply node coupled to a first electrode of the upper transistor and a second voltage supply node is coupled to a second electrode of the lower transistor. An upper driver transistor selectively couples a gate electrode of the upper transistor to an upper drive voltage node, the upper driver transistor having a control electrode coupled to an upper switched voltage supply circuit. There is also a lower switched voltage supply circuit coupled to a gate electrode of the lower transistor and a voltage dependent non-linear resistor is coupled across the gate electrode and second electrode of the upper transistor. In use, when the lower transistor and upper driver transistor are in a non-conductive state a potential difference across the voltage dependent non-linear resistor is sufficiently small enough to control the upper transistor into a conductive state. Conversely, when the lower transistor and upper driver transistor are in a conductive state the potential difference across the voltage dependent non-linear resistor provides a negative bias to the gate electrode of the upper transistor that has a negative potential sufficient to control the upper transistor into a non-conductive state.

摘要翻译： 由两个子电路形成的H桥电路，两个子电路通过负载网络彼此耦合，跨越每个子电路的相应负载节点。 两个子电路的每个子电路包括耗尽型上部晶体管，其第二电极耦合到下部晶体管的第一电极。 子电路的负载节点设置在上部晶体管的第二电极和下部晶体管的第一电极之间。 存在耦合到上部晶体管的第一电极的第一电压供应节点和第二电压供应节点耦合到下部晶体管的第二电极。 上驱动晶体管将上晶体管的栅电极选择性地耦合到上驱动电压节点，上驱动晶体管具有耦合到上开关电压电路的控制电极。 还有一个耦合到下部晶体管的栅电极的较低开关电压电源电路，并且依赖于电压的非线性电阻器耦合在上部晶体管的栅电极和第二电极之间。 在使用中，当下晶体管和上驱动晶体管处于非导通状态时，电压相关非线性电阻器两端的电位差足够小以将上晶体管控制为导通状态。 相反，当下晶体管和上驱动晶体管处于导通状态时，电压相关非线性电阻器两端的电位差向上晶体管的栅极提供负偏压，该栅极具有足以控制上晶体管的负电位 非导电状态。

公开(公告)号：US20090153242A1

公开(公告)日：2009-06-18

申请号：US11958978

申请日：2007-12-18

申请人： Lawrence F. Cygan ,  Curtis M. Williams ,  Andrew M. Khan

发明人： Lawrence F. Cygan ,  Curtis M. Williams ,  Andrew M. Khan

IPC分类号： H03F3/38

CPC分类号： H03F3/2173 ,  H03F3/195 ,  H03F3/245 ,  H03F2200/331 ,  H03F2200/336 ,  H03F2200/451

摘要： A method and apparatus for direct conversion of digital data to high power RF signals, known as DDRF. The method and apparatus receive a digital signal, create a digital modulated signal therefrom, and amplify the modulated signal with an H-bridge Power Amplifier for transmission. DDRF uses a multi-level H-bridge amplification circuit to establish a more power efficient digital transmitter.

摘要翻译： 一种用于将数字数据直接转换为大功率RF信号的方法和装置，称为DDRF。 该方法和装置接收数字信号，从中产生数字调制信号，并用H桥功率放大器放大调制信号进行传输。 DDRF使用多电平H桥放大电路来建立更高功率的数字发射器。

公开(公告)号：US07825724B2

公开(公告)日：2010-11-02

申请号：US11958978

申请日：2007-12-18

申请人： Lawrence F. Cygan ,  Curtis M. Williams ,  Andrew M. Khan

发明人： Lawrence F. Cygan ,  Curtis M. Williams ,  Andrew M. Khan

IPC分类号： H03F3/38

CPC分类号： H03F3/2173 ,  H03F3/195 ,  H03F3/245 ,  H03F2200/331 ,  H03F2200/336 ,  H03F2200/451

摘要： A method and apparatus for direct conversion of digital data to high power RF signals, known as DDRF. The method and apparatus receive a digital signal, create a digital modulated signal therefrom, and amplify the modulated signal with an H-bridge Power Amplifier for transmission. DDRF uses a multi-level H-bridge amplification circuit to establish a more power efficient digital transmitter.

摘要翻译： 一种用于将数字数据直接转换为大功率RF信号的方法和装置，称为DDRF。 该方法和装置接收数字信号，从中产生数字调制信号，并用H桥功率放大器放大调制信号进行传输。 DDRF使用多电平H桥放大电路来建立更高功率的数字发射器。

公开(公告)号：US07403066B2

公开(公告)日：2008-07-22

申请号：US11271395

申请日：2005-11-10

申请人： Curtis M. Williams

发明人： Curtis M. Williams

IPC分类号： H03F3/38

CPC分类号： H03F3/217 ,  H03F2200/331

摘要： A method and system for creating a spectral null in a switching amplifier system is provided. The method includes receiving an input signal in a first modulated form at an input stage 104 of the amplifier. The method further includes converting the input signal to a second modulated form. The input signal in the second modulated form is referred to as a first switching signal. Further, the method includes determining switching frequency of the first switching signal from a predefined cycle time of the first switching signal. Thereafter, the method includes inverting the first switching signal and delaying it by a predefined delay amount. The inverted and delayed first switching signal is referred to as a second switching signal The method further includes summing the first switching signal from the second switching signal, which results in a two-state output signal. The two-state output signal is free of any components at the switching frequency and its odd harmonics.

摘要翻译： 提供了一种用于在开关放大器系统中产生频谱零点的方法和系统。 该方法包括在放大器的输入级104处以第一调制形式接收输入信号。 该方法还包括将输入信号转换成第二调制形式。 将第二调制形式的输入信号称为第一切换信号。 此外，该方法包括从第一开关信号的预定周期时间确定第一开关信号的开关频率。 此后，该方法包括反转第一切换信号并将其延迟预定义的延迟量。 反相和延迟的第一切换信号被称为第二切换信号。该方法还包括对来自第二切换信号的第一切换信号进行求和，这导致两状态输出信号。 双态输出信号在开关频率及其奇次谐波处没有任何元件。