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    Switch level reliable transmission
    5.
    发明授权
    Switch level reliable transmission 有权
    开关级可靠传输

    公开(公告)号：US07200790B2

    公开(公告)日：2007-04-03

    申请号：US10616269

    申请日：2003-07-08

    申请人： Anup K. Sharma ,  Michael K. Wong

    发明人： Anup K. Sharma ,  Michael K. Wong

    IPC分类号： H04L1/18

    CPC分类号： G06F11/1443

    摘要： A microchip configured to reliably transmit data is provided. The microchip includes a memory region and a selection module configured to select a portion of the data from the memory region. An error checking module configured to calculate a value derived from the selected portion of the data is provided. A pointer region including a plurality of object pointers is included. One of the object pointers is associated with an address of the portion of the data. The object pointer associated with the address is configured to receive a signal indicating an error associated with the transmission of the data. A scheduler module in communication with each of the plurality of object pointers is provided. The scheduler module is configured to schedule re-transmission of the selected portion of the data. A system and a method for reliably transmitting data between microchips are also provided.

    摘要翻译： 提供了一种被配置为可靠地传送数据的微芯片。 微芯片包括存储器区域和被配置为从存储器区域中选择数据的一部分的选择模块。 提供了一种配置成计算从数据的所选部分导出的值的错误检查模块。 包括包括多个对象指针的指针区域。 其中一个对象指针与数据部分的地址相关联。 与地址相关联的对象指针被配置为接收指示与数据传输相关联的错误的信号。 提供与多个对象指针中的每一个通信的调度器模块。 调度器模块被配置为调度所选择的数据部分的重新传输。 还提供了一种在微芯片之间可靠地传输数据的系统和方法。

    Frequency comparison and generation in an integrated processor
    6.
    发明授权
    Frequency comparison and generation in an integrated processor 失效
    集成处理器中的频率比较和生成

    公开(公告)号：US6081143A

    公开(公告)日：2000-06-27

    申请号：US938530

    申请日：1997-09-26

    申请人： Kenneth S. Ho ,  Anup K. Sharma

    发明人： Kenneth S. Ho ,  Anup K. Sharma

    IPC分类号： G06F1/12 ,  H03K5/01

    CPC分类号： G06F1/12

    摘要： An integrated processor includes a microprocessor core and a bus interface unit. The integrated processor receives a reference clock signal and an external clock signal. The frequency of the reference clock signal is compared to the frequency of the external clock signal. Based upon this comparison, the appropriate frequency for the internal clock signal that controls the bus interface unit is determined. A clock generation circuit, such as a phase-locked loop, generates the appropriate frequency for the internal clock signal based upon the comparison of the reference clock signal and external clock signal.

    摘要翻译： 集成处理器包括微处理器内核和总线接口单元。 集成处理器接收参考时钟信号和外部时钟信号。 将参考时钟信号的频率与外部时钟信号的频率进行比较。 基于该比较，确定控制总线接口单元的内部时钟信号的适当频率。 基于参考时钟信号和外部时钟信号的比较，诸如锁相环的时钟产生电路为内部时钟信号产生适当的频率。

    Method for generating a synchronization signal based on the clock ratio between two clock domains for data transfer between the domains
    7.
    发明授权
    Method for generating a synchronization signal based on the clock ratio between two clock domains for data transfer between the domains 有权
    用于基于两个时钟域之间的时钟比率来生成同步信号以用于域之间的数据传输的方法

    公开(公告)号：US07134035B2

    公开(公告)日：2006-11-07

    申请号：US10452247

    申请日：2003-05-30

    申请人： Anup K. Sharma ,  Venkatram Krishnaswamy

    发明人： Anup K. Sharma ,  Venkatram Krishnaswamy

    IPC分类号： G06F1/04

    CPC分类号： G06F1/12

    摘要： A method for communicating across first and second frequency domains of an integrated microchip is provided. The method initiates with determining a clock ratio between the first frequency domain and the second frequency domain. The first frequency domain is associated with a faster clock cycle. Then, a synchronizing signal based upon the clock ratio is generated. The synchronizing signal coordinates communication of data between the first and second frequency domains. Next, the data is transferred between respective frequency domains according to the synchronizing signal. A microchip and a system enabling synchronous data transfer across different frequency domains are also provided.

    摘要翻译： 提供了一种用于在集成微芯片的第一和第二频域上通信的方法。 该方法通过确定第一频域和第二频域之间的时钟比来启动。 第一个频域与更快的时钟周期相关联。 然后，产生基于时钟比的同步信号。 同步信号协调第一和第二频域之间的数据通信。 接下来，根据同步信号在各个频域之间传送数据。 还提供了一种微芯片和实现跨不同频域的同步数据传输的系统。