公开(公告)号：US20230344614A1

公开(公告)日：2023-10-26

申请号：US18312279

申请日：2023-05-04

Applicant: Apple Inc.

Inventor： Feng Xue ,  Yang-Seok Choi ,  Daniel Schwartz ,  Shu-Ping Yeh ,  Namyoon Lee ,  Venkatesan Nallampatti Ekambaram ,  Ching-En Lee ,  Chia-Hsiang Chen

IPC: H04L5/14 ,  H04B1/525 ,  H04B1/44 ,  H04B15/00 ,  H04B1/48 ,  H04B7/0413

CPC classification number: H04L5/1461 ,  H04B1/525 ,  H04B1/44 ,  H04B15/00 ,  H04B1/48 ,  H04B7/0413

Abstract: A communication circuit arrangement includes a signal path circuit to estimate, using a first kernel dimension filter and a first delay tap dimension filter, a first interference signal produced by a first amplifier. The signal path circuit further estimates, using a second kernel dimension filter and a second delay tap dimension filter, a second interference signal produced by a second amplifier. A cancellation circuit of the communication circuit arrangement may subtract a combination of the first interference signal and the second interference signal from a received signal to obtain a filtered signal, and one or more filter adaptation circuits may alternate between a kernel update phase and a delay update phase to update the first kernel dimension filter and the second kernel dimension filter during the kernel update phase, and update the first delay tap dimension filter and the second delay tap dimension filter during the delay update phase.

公开(公告)号：US11671235B2

公开(公告)日：2023-06-06

申请号：US16327386

申请日：2016-09-29

Applicant: Apple Inc.

Inventor： Feng Xue ,  Yang-Seok Choi ,  Daniel Schwartz ,  Shu-Ping Yeh ,  Namyoon Lee ,  Venkatesan Nallampatti Ekambaram ,  Ching-En Lee ,  Chia-Hsiang Chen

IPC: H04L5/14 ,  H04B1/44 ,  H04B1/48 ,  H04B1/525 ,  H04B7/0413 ,  H04B15/00

CPC classification number: H04L5/1461 ,  H04B1/44 ,  H04B1/48 ,  H04B1/525 ,  H04B7/0413 ,  H04B15/00

Abstract: A communication circuit arrangement includes a first kernel dimension filter circuit configured to apply a first kernel dimension filter to a first input signal to estimate a first kernel dimension interference signal from a first amplifier, a second kernel dimension filter circuit configured to apply a second kernel dimension filter to a second input signal to estimate a second kernel dimension interference signal from a second amplifier, a joint delay tap dimension filter configured to apply a joint delay tap dimension filter to a combination of the first kernel dimension interference signal and the second kernel dimension interference signal to obtain an estimated joint interference signal, and a cancelation circuit configured to remove the estimated joint interference signal from a received signal to obtain a clean signal.