公开(公告)号：US20150031207A1

公开(公告)日：2015-01-29

申请号：US14121021

申请日：2014-07-18

Applicant: Applied Materials, Inc.

Inventor： Chris Bencher ,  Adam Brand

IPC: H01L21/308 ,  H01L21/28

CPC classification number: H01L21/0337 ,  H01L21/28123 ,  H01L21/32139

Abstract: A method of fabricating multiple gate lengths simultaneously on a single chip surface. Hard masking materials which are used as spacers in a field effects transistor generation process are converted into a spacer mask to increase the line density on the chip surface. These hard masking spacers are further patterned by either trimming or by enlarging a portion of a spacer at various locations on a chip surface, to enable formation of multiple gate lengths on a single chip, using a series of process steps which make use of combinations of hydrophobic and hydrophilic materials.

Abstract translation: 在单个芯片表面上同时制造多个栅极长度的方法。 在场效应晶体管生成过程中用作间隔物的硬掩模材料被转换成间隔掩模以增加芯片表面上的线密度。 这些硬掩蔽间隔物通过在芯片表面上的各个位置进行修整或扩大间隔物的一部分进一步图案化，以使得能够在单个芯片上形成多个栅极长度，使用一系列工艺步骤，其使用 疏水和亲水的材料。