Abstract:
The present disclosure provides methods for via reveal etching process to form through-silicon vias (TSVs) in a substrate. In one embodiment, a method for performing a via reveal process to form through-silicon vias in a substrate includes providing a substrate having partial through-silicon vias formed from a first surface of the substrate into a processing chamber, wherein the partial through-silicon vias formed in the substrate are blind vias, supplying an etching gas mixture including at least a fluorine containing gas and a chlorine containing gas into the processing chamber, and preferentially removing a portion of the substrate from a second surface of the substrate to expose the through-silicon vias until a desired length of the through-silicon vias is exposed from the second surface of the substrate.