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公开(公告)号:US11216993B2
公开(公告)日:2022-01-04
申请号:US16697903
申请日:2019-11-27
Applicant: Arm Limited
Abstract: When processing graphics primitives in a graphics processing system, the render output is divided into a plurality of regions for rendering, each region comprising a respective area of the render output. It is determined for which of the plurality of regions of the render output a primitive should be rendered for. Primitive data for rendering the primitive is then stored either in a combined data structure in memory that is associated with a plurality of different regions of the render output, or is stored in a respective data structure for each region of the render output it is determined the primitive should be rendered for. Which manner the primitive data is stored is determined in dependence on a property, e.g. a coverage, of the primitive.
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公开(公告)号:US11049216B1
公开(公告)日:2021-06-29
申请号:US16748721
申请日:2020-01-21
Applicant: Arm Limited
Abstract: A graphics processor that rasterises input primitives to generate graphics fragments to be processed and renders the graphics fragments to generate a first, higher resolution version of a render output. When processing of a render output is stopped before the render output is finished, the first resolution version of the render output is downsampled to a second, lower resolution and the downsampled data elements at the second resolution are written out together with a set of difference values indicative of the differences between the data elements at the first resolution and the downsampled data elements at the second resolution. Then, when processing of the render output is resumed, these values can be loaded in and used to reconstruct the array of data elements at the first resolution for use when continuing processing of the render output.
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公开(公告)号:US20180197268A1
公开(公告)日:2018-07-12
申请号:US15404049
申请日:2017-01-11
Applicant: ARM Limited
Inventor: Bradley Albert Grantham , Alexander Eugene Chalfin
CPC classification number: G06T11/001 , G06T11/40 , G06T15/005 , G06T15/80
Abstract: A graphics processing apparatus performs an intermediate processing pass in which region lists that indicate geometry for respective regions of an intermediate projection surface are generated and stored. A subsequent processing pass is then performed in which a region of the intermediate projection surface is selected using a vector for a fragment, and geometry data for shading the fragment is obtained with reference to the region list that was stored for the selected region in the intermediate processing pass. The fragment can then be shaded using the obtained data for the geometry. The apparatus can provide a render output that is not limited by the resolution of an intermediate render output.
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公开(公告)号:US12061967B2
公开(公告)日:2024-08-13
申请号:US17132750
申请日:2020-12-23
Applicant: Arm Limited
Inventor: John Wakefield Brothers, III , Kartikeya Bhardwaj , Alexander Eugene Chalfin , Danny Daysang Loh
IPC: G06N3/0464 , G06N3/04 , G06N3/08
CPC classification number: G06N3/04 , G06N3/0464 , G06N3/08
Abstract: A method of processing input data for a given layer of a neural network using a data processing system comprising compute resources for performing convolutional computations is described. The input data comprises a given set of input feature maps, IFMs, and a given set of filters. The method comprises generating a set of part-IFMs including pluralities of part-IFMs which correspond to respective IFMs, of the given set of IFMs. The method further includes grouping part-IFMs in the set of part-IFMs into a set of selections of part-IFMs. The method further includes convolving, by respective compute resources of the data processing system, the set of selections with the given set of filters to compute a set of part-output feature maps. A data processing system for processing input data for a given layer of a neural network is also described.
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公开(公告)号:US10559093B2
公开(公告)日:2020-02-11
申请号:US15870928
申请日:2018-01-13
Applicant: Arm Limited
Inventor: Srihari Pratapa , Hardik Sharma , Thomas Jeremy Olson , Alexander Eugene Chalfin
Abstract: A data processing apparatus implements an artificial neural network to generate a result that indicates one or more encoding options to use when encoding a set of data elements using an encoding scheme. The data processing apparatus can provide an efficient way of selecting between possible encoding options that can be used to encode a set of data elements.
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公开(公告)号:US20190221006A1
公开(公告)日:2019-07-18
申请号:US15870928
申请日:2018-01-13
Applicant: Arm Limited
Inventor: Srihari Pratapa , Hardik Sharma , Thomas Jeremy Olson , Alexander Eugene Chalfin
Abstract: A data processing apparatus implements an artificial neural network to generate a result that indicates one or more encoding options to use when encoding a set of data elements using an encoding scheme. The data processing apparatus can provide an efficient way of selecting between possible encoding options that can be used to encode a set of data elements.
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公开(公告)号:US09679342B2
公开(公告)日:2017-06-13
申请号:US13940716
申请日:2013-07-12
Applicant: ARM LIMITED
Inventor: Alexander Eugene Chalfin , Bradley Albert Grantham
CPC classification number: G06T1/20 , G06F9/3851 , G06T15/005 , G06T15/04 , G09G5/363
Abstract: A graphics processing pipeline includes a vertex transformation stage 14 having a vertex transformation cache 20. If a request to transform vertex data is received and the vertex transformation cache 20 indicates that the transformed vertex data for that received request has already been generated, then a pointer to that previously generated transformed vertex data is output within a result data stream in place of the transform vertex data. The transform vertex data is stored to a memory 10 before being retrieved as required by a rasterization stage 16.
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公开(公告)号:US20240378084A1
公开(公告)日:2024-11-14
申请号:US18316125
申请日:2023-05-11
Applicant: Arm Limited
Inventor: Elliot Maurice Simon Rosemarine , Alexander Eugene Chalfin , Ozgur Tasdizen , Tord Kvestad Øygard
IPC: G06F9/50
Abstract: According to the present techniques there is provided a method of operating a data processor unit to generate processing tasks: the data processor unit comprising: a control circuit to receive, from a host processor unit, a request for the data processor unit to perform a processing job; an iterator unit to process the request and generate a workload comprising one or more tasks for the requested job; one or more execution units to perform the one or more tasks; storage to store system information indicative of a status of at least one component of the data processor unit; the method comprising: receiving, at the control circuit, a first request to perform a first processing job; processing, at the iterator unit, the first request and generating a workload comprising one or more tasks for the first processing job based on or in response to the system information in storage, wherein at least one characteristic of the workload is dependent on the system information.
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公开(公告)号:US11210847B2
公开(公告)日:2021-12-28
申请号:US16697942
申请日:2019-11-27
Applicant: Arm Limited
Abstract: When processing graphics primitives in a graphics processing system, the render output is divided into a plurality of regions for rendering, each region comprising a respective area of the render output. It is determined for which of the plurality of regions of the render output a primitive should be rendered for. Associated state data for rendering the primitive is stored in a “state data” data structure in memory. For each region of the render output it is determined the primitive should be rendered for, a reference to the associated state data for rendering the primitive is stored in a respective, different data structure for each different region of the render output it is determined the primitive should be rendered for.
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公开(公告)号:US11127110B2
公开(公告)日:2021-09-21
申请号:US15446997
申请日:2017-03-01
Applicant: ARM Limited , APICAL LIMITED
Inventor: Ian Rudolf Bratt , Alexander Eugene Chalfin , Eric Kunze , Paul Stanley Hughes , Alex Kornienko , Damian Piotr Modrzyk , Metin Gokhan Ünal , Jonathan Adam Lawton
Abstract: A display controller 93 in a data processing system includes a timewarp module (transformation circuitry) 100 that is operable to perform timewarp processing of a rendered frame 92 generated by a graphics processor (GPU) 91 for provision to a display panel 94. The timewarp module (transformation circuitry) 100 operates to transform an input surface 92 read by the display controller 93 based on received view orientation data to provide an appropriately “timewarped” transformed version of the input surface as an output transformed surface for display on the display 94.
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