公开(公告)号：US11074945B1

公开(公告)日：2021-07-27

申请号：US16807104

申请日：2020-03-02

Applicant: Arm Limited

Inventor： Rajiv Kumar Sisodia ,  Kedhar Malla ,  Disha Singh

IPC: G11C7/10 ,  G11C7/06 ,  G11C7/22

Abstract: Various implementations described herein are related to a device having a sense amplifier with multiple output ports. The device may include tri-state buffer circuitry having multiple tri-state buffers coupled to the multiple output ports of the sense amplifier. The device may include latch circuitry having multiple latches coupled to the multiple tri-state buffers of the tri-state buffer circuitry.

公开(公告)号：US20220415385A1

公开(公告)日：2022-12-29

申请号：US17897716

申请日：2022-08-29

Applicant: Arm Limited

Inventor： Rajiv Kumar Sisodia ,  Disha Singh ,  Gautam Garg ,  Srinivasan Srinath ,  Georgy Jacob

IPC: G11C11/418 ,  G11C11/412 ,  G11C11/419

Abstract: Various implementations described herein are directed to a device having a first read wordline formed in a first metal layer and a read wordline driver having an output node coupled to one or more memory cells via the first read wordline formed in the first metal layer. The device may include a second read wordline formed in a second metal layer that is different than the first metal layer, and the read wordline driver may have an input node coupled to the second read wordline formed in the second metal layer.

公开(公告)号：US11100965B1

公开(公告)日：2021-08-24

申请号：US16821945

申请日：2020-03-17

Applicant: Arm Limited

Inventor： Rajiv Kumar Sisodia ,  Disha Singh ,  Yattapu Viswanatha Reddy

IPC: G11C7/12 ,  G11C8/18 ,  G11C7/22 ,  G11C8/08

Abstract: Various implementations described herein are related to a device having an array of bitcells that are accessible via wordlines and bitlines including unselected bitlines and a selected bitline. Each bitcell in the array of bitcells may be selectable via a selected wordline of the wordlines and the selected bitline of the bitlines. The device may include precharge circuitry that is configured to selectively precharge the unselected bitlines and the selected bitline before arrival of a wordline signal on the selected wordline.

公开(公告)号：US20210249070A1

公开(公告)日：2021-08-12

申请号：US16786779

申请日：2020-02-10

Applicant: Arm Limited

Inventor： Rajiv Kumar Sisodia ,  Disha Singh ,  Gautam Garg ,  Srinivasan Srinath ,  Georgy Jacob

IPC: G11C11/418 ,  G11C11/419 ,  G11C11/412

Abstract: Various implementations described herein are directed to a device having a first read wordline formed in a first metal layer and a read wordline driver having an output node coupled to one or more memory cells via the first read wordline formed in the first metal layer. The device may include a second read wordline formed in a second metal layer that is different than the first metal layer, and the read wordline driver may have an input node coupled to the second read wordline formed in the second metal layer.

公开(公告)号：US11830542B2

公开(公告)日：2023-11-28

申请号：US17897716

申请日：2022-08-29

Applicant: Arm Limited

Inventor： Rajiv Kumar Sisodia ,  Disha Singh ,  Gautam Garg ,  Srinivasan Srinath ,  Georgy Jacob

IPC: G11C11/00 ,  G11C11/418 ,  G11C11/412 ,  G11C11/419

CPC classification number: G11C11/418 ,  G11C11/412 ,  G11C11/419

Abstract: Various implementations described herein are directed to a device having a first read wordline formed in a first metal layer and a read wordline driver having an output node coupled to one or more memory cells via the first read wordline formed in the first metal layer. The device may include a second read wordline formed in a second metal layer that is different than the first metal layer, and the read wordline driver may have an input node coupled to the second read wordline formed in the second metal layer.

公开(公告)号：US11430506B2

公开(公告)日：2022-08-30

申请号：US16786779

申请日：2020-02-10

Applicant: Arm Limited

Inventor： Rajiv Kumar Sisodia ,  Disha Singh ,  Gautam Garg ,  Srinivasan Srinath ,  Georgy Jacob

IPC: G11C11/00 ,  G11C11/418 ,  G11C11/412 ,  G11C11/419

Abstract: Various implementations described herein are directed to a device having a first read wordline formed in a first metal layer and a read wordline driver having an output node coupled to one or more memory cells via the first read wordline formed in the first metal layer. The device may include a second read wordline formed in a second metal layer that is different than the first metal layer, and the read wordline driver may have an input node coupled to the second read wordline formed in the second metal layer.