公开(公告)号：US20230342150A1

公开(公告)日：2023-10-26

申请号：US18245840

申请日：2020-11-26

Applicant: Arm Limited

Inventor： Ilias VOUGIOUKAS ,  Andreas Lars SANDBERG ,  Nikos NIKOLERIS

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/30061 ,  G06F9/30036 ,  G06F9/3804

Abstract: Apparatuses and methods for branch prediction are provided. Branch prediction circuitry generates prediction with respect to branch instructions of whether those branches will be taken or not-taken. Hypervector generation circuitry assigns an arbitrary hypervector in deterministic dependence on an address of each branch instruction, wherein the hypervectors comprises at least 500 bits. Upon the resolution of a branch a corresponding hypervector is added to a stored taken hypervector or a stored not-taken hypervector in dependence on the resolution of the branch. The branch prediction circuitry generates a prediction for a branch instructions in dependence on a mathematical distance metric of a hypervector generated for that branch instruction from the stored taken hypervector or the not-taken hypervector.

公开(公告)号：US20200293457A1

公开(公告)日：2020-09-17

申请号：US16778040

申请日：2020-01-31

Applicant: Arm Limited

Inventor： Ilias VOUGIOUKAS ,  Nikos NIKOLERIS ,  Andreas Lars SANDBERG ,  Stephan DIESTELHORST

IPC: G06F12/1027 ,  G06N5/04

Abstract: Apparatus comprises two or more processing devices each having an associated translation lookaside buffer to store translation data defining address translations between virtual and physical memory addresses, each address translation being associated with a respective virtual address space; and control circuitry to control the transfer of at least a subset of the translation data from the translation lookaside buffer associated with a first processing device to the translation lookaside buffer associated with a second, different, processing device.

公开(公告)号：US20190361707A1

公开(公告)日：2019-11-28

申请号：US16018440

申请日：2018-06-26

Applicant: Arm Limited

Inventor： Ilias VOUGIOUKAS ,  Stephan DIESTELHORST ,  Andreas Lars SANDBERG ,  Nikos NIKOLERIS

IPC: G06F9/38 ,  G06F9/30

Abstract: A TAGE branch predictor has, as its fallback predictor, a perceptron predictor. This provides a branch predictor which reduces the penalty of context switches and branch prediction state flushes.