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    Buffered demod and demap functions
    4.
    发明授权
    Buffered demod and demap functions 失效
    缓冲解调和解映射功能

    公开(公告)号：US08520500B2

    公开(公告)日：2013-08-27

    申请号：US12407482

    申请日：2009-03-19

    申请人： Jeremy H. Lin ,  Arunava Chaudhuri ,  Raghu N. Challa ,  Hemanth Sampath

    发明人： Jeremy H. Lin ,  Arunava Chaudhuri ,  Raghu N. Challa ,  Hemanth Sampath

    IPC分类号： H04J11/00

    CPC分类号： H04L25/0202 ,  H04L5/0007 ,  H04L5/0023 ,  H04L27/265

    摘要： An apparatus operable in a wireless communication system, the apparatus may include an FFT symbol buffer and a demapping device. The FFT symbol buffer can feed FFT symbol data derived from received communication signals to a channel estimation device and a shared buffer. The channel estimation device can also provide intermediate data to the shared buffer. The intermediate data may be in tile form and can be derived from the FFT symbol data. Further, the intermediate data can be stored in the shared buffer. The demapping device can extract the intermediate data from the shared buffer in various forms including sub-packet form.

    摘要翻译： 一种在无线通信系统中可操作的装置，该装置可以包括FFT符号缓冲器和解映射装置。 FFT符号缓冲器可以将从接收到的通信信号导出的FFT符号数据馈送到信道估计装置和共享缓冲器。 信道估计装置还可以向共享缓冲器提供中间数据。 中间数据可以是瓦片形式，并且可以从FFT符号数据导出。 此外，中间数据可以存储在共享缓冲器中。 解映射设备可以以包括子包形式的各种形式从共享缓冲器提取中间数据。

    BUFFERED DEMOD AND DEMAP FUNCTIONS
    6.
    发明申请
    BUFFERED DEMOD AND DEMAP FUNCTIONS 失效
    缓冲的演示和演示功能

    公开(公告)号：US20090245091A1

    公开(公告)日：2009-10-01

    申请号：US12407482

    申请日：2009-03-19

    申请人： Jeremy H. Lin ,  Arunava Chaudhuri ,  Raghu N. Challa ,  Hemanth Sampath

    发明人： Jeremy H. Lin ,  Arunava Chaudhuri ,  Raghu N. Challa ,  Hemanth Sampath

    IPC分类号： H04J11/00

    CPC分类号： H04L25/0202 ,  H04L5/0007 ,  H04L5/0023 ,  H04L27/265

    摘要： An apparatus operable in a wireless communication system, the apparatus may include an FFT symbol buffer and a demapping device. The FFT symbol buffer can feed FFT symbol data derived from received communication signals to a channel estimation device and a shared buffer. The channel estimation device can also provide intermediate data to the shared buffer. The intermediate data may be in tile form and can be derived from the FFT symbol data. Further, the intermediate data can be stored in the shared buffer. The demapping device can extract the intermediate data from the shared buffer in various forms including sub-packet form.

    摘要翻译： 一种在无线通信系统中可操作的装置，该装置可以包括FFT符号缓冲器和解映射装置。 FFT符号缓冲器可以将从接收到的通信信号导出的FFT符号数据馈送到信道估计装置和共享缓冲器。 信道估计装置还可以向共享缓冲器提供中间数据。 中间数据可以是瓦片形式，并且可以从FFT符号数据导出。 此外，中间数据可以存储在共享缓冲器中。 解映射设备可以以包括子包形式的各种形式从共享缓冲器提取中间数据。

    Broadband pilot channel estimation using a reduced order FFT and a hardware interpolator
    7.
    发明授权
    Broadband pilot channel estimation using a reduced order FFT and a hardware interpolator 有权
    使用降阶FFT和硬件内插器的宽带导频信道估计

    公开(公告)号：US08699529B2

    公开(公告)日：2014-04-15

    申请号：US12405082

    申请日：2009-03-16

    申请人： Petru Cristian Budianu ,  Arunava Chaudhuri ,  Raghu N. Challa

    发明人： Petru Cristian Budianu ,  Arunava Chaudhuri ,  Raghu N. Challa

    IPC分类号： H04J1/02 ,  H04L25/02 ,  H04J11/00

    CPC分类号： H04L25/0202 ,  H04B1/76 ,  H04J11/00 ,  H04L25/0212 ,  H04L25/023 ,  H04L25/0232

    摘要： Within a receiver, a channel estimation mechanism involves a hardware interpolator. In a first mode, narrowband pilot values are analyzed to generate channel parameters that are supplied to the interpolator such that the interpolator generates channel estimate values. The channel estimate values are used to demodulate a tile of a frame. In a second mode, broadband pilot values are supplied to an IFFT, thereby generating time domain values. After time domain processing, an FFT is employed to generate intermediate channel estimate values. These intermediate values are analyzed to determine channel parameters, which in turn are supplied to the hardware interpolator so that the interpolator generates a larger number of channel estimate values. After phase adjustment, the channel estimate values are used in demodulation. Use of the interpolator in the broadband mode allows the FFT employed to be of a smaller order, and to consume less power and/or processing resources.

    摘要翻译： 在接收机内，信道估计机制涉及硬件插值器。 在第一模式中，分析窄带导频值以产生提供给内插器的信道参数，使得内插器生成信道估计值。 信道估计值用于解调帧的瓦片。 在第二模式中，宽带导频值被提供给IFFT，从而产生时域值。 在时域处理之后，采用FFT来产生中间信道估计值。 分析这些中间值以确定信道参数，其又被提供给硬件插值器，使得内插器产生更大数量的信道估计值。 相位调整后，信道估计值用于解调。 在宽带模式下使用内插器允许所采用的FFT具有较小的次序，并且消耗更少的功率和/或处理资源。

    Broadband Pilot Channel Estimation Using A Reduced Order FFT and a Hardware Interpolator
    8.
    发明申请
    Broadband Pilot Channel Estimation Using A Reduced Order FFT and a Hardware Interpolator 有权
    使用降序FFT和硬件插值器的宽带导频信道估计

    公开(公告)号：US20090245090A1

    公开(公告)日：2009-10-01

    申请号：US12405082

    申请日：2009-03-16

    申请人： Petru Cristian Budianu ,  Arunava Chaudhuri ,  Raghu N. Challa

    发明人： Petru Cristian Budianu ,  Arunava Chaudhuri ,  Raghu N. Challa

    IPC分类号： H04J11/00 ,  H04K1/10

    CPC分类号： H04L25/0202 ,  H04B1/76 ,  H04J11/00 ,  H04L25/0212 ,  H04L25/023 ,  H04L25/0232

    摘要： Within a receiver, a channel estimation mechanism involves a hardware interpolator. In a first mode, narrowband pilot values are analyzed to generate channel parameters that are supplied to the interpolator such that the interpolator generates channel estimate values. The channel estimate values are used to demodulate a tile of a frame. In a second mode, broadband pilot values are supplied to an IFFT, thereby generating time domain values. After time domain processing, an FFT is employed to generate intermediate channel estimate values. These intermediate values are analyzed to determine channel parameters, which in turn are supplied to the hardware interpolator so that the interpolator generates a larger number of channel estimate values. After phase adjustment, the channel estimate values are used in demodulation. Use of the interpolator in the broadband mode allows the FFT employed to be of a smaller order, and to consume less power and/or processing resources.

    摘要翻译： 在接收机内，信道估计机制涉及硬件插值器。 在第一模式中，分析窄带导频值以产生提供给内插器的信道参数，使得内插器生成信道估计值。 信道估计值用于解调帧的瓦片。 在第二模式中，宽带导频值被提供给IFFT，从而产生时域值。 在时域处理之后，采用FFT来产生中间信道估计值。 分析这些中间值以确定信道参数，其又被提供给硬件插值器，使得内插器产生更大数量的信道估计值。 相位调整后，信道估计值用于解调。 在宽带模式下使用内插器允许所采用的FFT具有较小的次序，并且消耗更少的功率和/或处理资源。

    ARCHITECTURE TO HANDLE CONCURRENT MULTIPLE CHANNELS
    9.
    发明申请
    ARCHITECTURE TO HANDLE CONCURRENT MULTIPLE CHANNELS 有权
    构建多个通道的通道

    公开(公告)号：US20090245435A1

    公开(公告)日：2009-10-01

    申请号：US12413069

    申请日：2009-03-27

    申请人： Raghu N. Challa ,  Hemanth Sampath ,  Ali RostamPisheh

    发明人： Raghu N. Challa ,  Hemanth Sampath ,  Ali RostamPisheh

    IPC分类号： H04L27/06

    CPC分类号： H04L1/0045 ,  H03M13/2957 ,  H03M13/6566 ,  H04L5/0007 ,  H04L27/2647

    摘要： An apparatus and method for enhanced downlink processing of received channels in a mobile communications system is described, containing a buffer for control data and traffic data, a demapper engine with at least two independently operating demappers for demapping the control and traffic data, a log-likelihood-ratio (LLR) buffer for supporting memory segments accessible by the demapper engine, a decoder engine containing decoders, each of the decoders operating on data from selected memory segment(s) of the LLR buffer, and an arbitrator providing control of at least one of the demapper engine, LLR buffer, and decoder engine. At least one of the decoders is suited for decoding control data and another one of the decoders is suited for decoding traffic data. By partitioning the decoding as such, an increase in downlink throughput can be obtained.

    摘要翻译： 描述了一种用于在移动通信系统中增强接收信道的下行链路处理的装置和方法，其包括用于控制数据和业务数据的缓冲器，具有至少两个独立操作的解映射器的解映射器引擎，用于对所述控制和业务数据进行解映射， 用于支持由解映射器引擎可访问的存储器段的似然比（LLR）缓冲器，包含解码器的解码器引擎，每个解码器对来自所选择的LLR缓冲器的所选存储器段的数据进行操作，以及至少提供至少控制的仲裁器 一个解映射引擎，LLR缓冲区和解码引擎。 解码器中的至少一个适合于解码控制数据，并且解码器中的另一个适合于解码业务数据。 通过分解解码，可以获得下行链路吞吐量的增加。

    Systems and Methods for Approximating Log Likelihood Ratios in a Communication System
    10.
    发明申请
    Systems and Methods for Approximating Log Likelihood Ratios in a Communication System 失效
    在通信系统中近似对数似然比的系统和方法

    公开(公告)号：US20090245433A1

    公开(公告)日：2009-10-01

    申请号：US12406868

    申请日：2009-03-18

    申请人： Raghu N. Challa ,  Hemanth Sampath ,  Sameer Vermani

    发明人： Raghu N. Challa ,  Hemanth Sampath ,  Sameer Vermani

    IPC分类号： H04L27/06

    CPC分类号： H04L25/067 ,  H04L1/0052

    摘要： Systems and methods for computing log likelihood ratios in a communication system are described. A demodulated symbol may be received. A set of scalars may be determined based on a modulation order, a signal-to-noise ratio for the symbol, and a bit of the symbol. At least one log likelihood ratio for the bit may be approximated using a piecewise linear process based on the scalars and the symbol.

    摘要翻译： 描述用于计算通信系统中的对数似然比的系统和方法。 可以接收解调的符号。 可以基于调制阶数，符号的信噪比和符号的位来确定一组标量。 可以使用基于标量和符号的分段线性处理来近似该比特的至少一个对数似然比。