公开(公告)号：US20110243038A1

公开(公告)日：2011-10-06

申请号：US13069296

申请日：2011-03-22

申请人： Raghu N. Challa ,  Brian Clarke Banister

发明人： Raghu N. Challa ,  Brian Clarke Banister

IPC分类号： H04J3/00

CPC分类号： H03G3/3078

摘要： In embodiments, user equipment (UE) is configured to acquire automatic gain control (AGC) of an analog RF front end by maintaining a plurality of M×N AGC loops in which the output of the power detector drives input of a gain state machine after a predetermined delay. Each of the loops corresponds to a different periodic set of tasks of (1/M) subframe in length. In each of the loops, the gain is determined by a power measurement taken ((M×N)+1) tasks ago. A synchronization signal, such as a Primary Synchronization Signal, occurs early in Time Division Duplex (TDD) subframes that follow selected downlink subframes. The periodicity of the selected subframes is N. This allows the UE to converge on proper AGC gain for downlink subframes through a relatively short search, such as a binary search. The UE can then decode the synchronization signal and acquire network timing.

摘要翻译： 在实施例中，用户设备（UE）被配置为通过维持多个M×N个AGC环路来获取模拟RF前端的自动增益控制（AGC），其中功率检测器的输出驱动增益状态机的输入驱动增益状态机的输入， 预定的延迟。 每个循环对应于长度为（1 / M）子帧的不同周期性任务集合。 在每个循环中，增益由以前进行的功率测量（（M×N）+1）任务确定。 诸如主同步信号的同步信号早于在选择的下行链路子帧之后的时分双工（TDD）子帧中。 所选择的子帧的周期为N.这允许UE通过相对较短的搜索（例如二进制搜索）收敛于针对下行链路子帧的适当的AGC增益。 然后，UE可以对同步信号进行解码并获取网络定时。

公开(公告)号：US20090248774A1

公开(公告)日：2009-10-01

申请号：US12411728

申请日：2009-03-26

申请人： Arunava Chaudhuri ,  Hemanth Sampath ,  Iwen Yao ,  Jeremy H. Lin ,  Raghu N. Challa ,  Min Wu

发明人： Arunava Chaudhuri ,  Hemanth Sampath ,  Iwen Yao ,  Jeremy H. Lin ,  Raghu N. Challa ,  Min Wu

IPC分类号： G06F17/14

CPC分类号： G06F17/142 ,  H04L5/0007 ,  H04L5/0023 ,  H04L5/0053 ,  H04L27/265 ,  H04L27/2662

摘要： An improved processing engine for performing Fourier transforms includes an instruction processor configured to process sequential instruction software commands and a Fourier transform engine coupled to the instruction processor. The Fourier transform engine is configured to perform Fourier transforms on a serial stream of data. The Fourier transform engine is configured to receive configuration information and operational data from the instruction processor via a set of software tasks.

摘要翻译： 用于执行傅里叶变换的改进的处理引擎包括配置成处理顺序指令软件命令的指令处理器和耦合到指令处理器的傅里叶变换引擎。 傅立叶变换引擎被配置为对串行数据流执行傅里叶变换。 傅里叶变换引擎被配置为经由一组软件任务从指令处理器接收配置信息和操作数据。

公开(公告)号：US20090245435A1

公开(公告)日：2009-10-01

申请号：US12413069

申请日：2009-03-27

申请人： Raghu N. Challa ,  Hemanth Sampath ,  Ali RostamPisheh

发明人： Raghu N. Challa ,  Hemanth Sampath ,  Ali RostamPisheh

IPC分类号： H04L27/06

CPC分类号： H04L1/0045 ,  H03M13/2957 ,  H03M13/6566 ,  H04L5/0007 ,  H04L27/2647

摘要： An apparatus and method for enhanced downlink processing of received channels in a mobile communications system is described, containing a buffer for control data and traffic data, a demapper engine with at least two independently operating demappers for demapping the control and traffic data, a log-likelihood-ratio (LLR) buffer for supporting memory segments accessible by the demapper engine, a decoder engine containing decoders, each of the decoders operating on data from selected memory segment(s) of the LLR buffer, and an arbitrator providing control of at least one of the demapper engine, LLR buffer, and decoder engine. At least one of the decoders is suited for decoding control data and another one of the decoders is suited for decoding traffic data. By partitioning the decoding as such, an increase in downlink throughput can be obtained.

摘要翻译： 描述了一种用于在移动通信系统中增强接收信道的下行链路处理的装置和方法，其包括用于控制数据和业务数据的缓冲器，具有至少两个独立操作的解映射器的解映射器引擎，用于对所述控制和业务数据进行解映射， 用于支持由解映射器引擎可访问的存储器段的似然比（LLR）缓冲器，包含解码器的解码器引擎，每个解码器对来自所选择的LLR缓冲器的所选存储器段的数据进行操作，以及至少提供至少控制的仲裁器 一个解映射引擎，LLR缓冲区和解码引擎。 解码器中的至少一个适合于解码控制数据，并且解码器中的另一个适合于解码业务数据。 通过分解解码，可以获得下行链路吞吐量的增加。

公开(公告)号：US20090245433A1

公开(公告)日：2009-10-01

申请号：US12406868

申请日：2009-03-18

申请人： Raghu N. Challa ,  Hemanth Sampath ,  Sameer Vermani

发明人： Raghu N. Challa ,  Hemanth Sampath ,  Sameer Vermani

IPC分类号： H04L27/06

CPC分类号： H04L25/067 ,  H04L1/0052

摘要： Systems and methods for computing log likelihood ratios in a communication system are described. A demodulated symbol may be received. A set of scalars may be determined based on a modulation order, a signal-to-noise ratio for the symbol, and a bit of the symbol. At least one log likelihood ratio for the bit may be approximated using a piecewise linear process based on the scalars and the symbol.

摘要翻译： 描述用于计算通信系统中的对数似然比的系统和方法。 可以接收解调的符号。 可以基于调制阶数，符号的信噪比和符号的位来确定一组标量。 可以使用基于标量和符号的分段线性处理来近似该比特的至少一个对数似然比。

公开(公告)号：US09083524B2

公开(公告)日：2015-07-14

申请号：US12409832

申请日：2009-03-24

申请人： Arunava Chaudhuri ,  Hemanth Sampath ,  Raghu N. Challa ,  Ravi Palanki ,  Sunil K. Kandukuri Narayan

发明人： Arunava Chaudhuri ,  Hemanth Sampath ,  Raghu N. Challa ,  Ravi Palanki ,  Sunil K. Kandukuri Narayan

IPC分类号： H04L1/20 ,  H04L1/16

CPC分类号： H04L1/20 ,  H04L1/1607 ,  H04L1/208

摘要： A method for sending an acknowledgment message in a wireless communication system is disclosed. A first signal is received before receiving a second signal from a transmitter. Decoded first data is extracted from the first signal. A third signal is produced by encoding and modulating the decoded first data. The second signal is demodulated to produce second symbols. The third signal and the second symbols are correlated.

摘要翻译： 公开了一种用于在无线通信系统中发送确认消息的方法。 在从发射机接收第二信号之前接收第一信号。 从第一信号中提取解码的第一数据。 通过对解码的第一数据进行编码和调制来产生第三信号。 第二信号被解调以产生第二符号。 第三信号和第二符号相关。

公开(公告)号：US08761316B2

公开(公告)日：2014-06-24

申请号：US12406868

申请日：2009-03-18

申请人： Raghu N. Challa ,  Hemanth Sampath ,  Sameer Vermani

发明人： Raghu N. Challa ,  Hemanth Sampath ,  Sameer Vermani

IPC分类号： H04L27/06

CPC分类号： H04L25/067 ,  H04L1/0052

摘要： Systems and methods for computing log likelihood ratios in a communication system are described. A demodulated symbol may be received. A set of scalars may be determined based on a modulation order, a signal-to-noise ratio for the symbol, and a bit of the symbol. At least one log likelihood ratio for the bit may be approximated using a piecewise linear process based on the scalars and the symbol.

摘要翻译： 描述用于计算通信系统中的对数似然比的系统和方法。 可以接收解调的符号。 可以基于调制阶数，符号的信噪比和符号的位来确定一组标量。 可以使用基于标量和符号的分段线性处理来近似该比特的至少一个对数似然比。

公开(公告)号：US08520500B2

公开(公告)日：2013-08-27

申请号：US12407482

申请日：2009-03-19

申请人： Jeremy H. Lin ,  Arunava Chaudhuri ,  Raghu N. Challa ,  Hemanth Sampath

发明人： Jeremy H. Lin ,  Arunava Chaudhuri ,  Raghu N. Challa ,  Hemanth Sampath

IPC分类号： H04J11/00

CPC分类号： H04L25/0202 ,  H04L5/0007 ,  H04L5/0023 ,  H04L27/265

摘要： An apparatus operable in a wireless communication system, the apparatus may include an FFT symbol buffer and a demapping device. The FFT symbol buffer can feed FFT symbol data derived from received communication signals to a channel estimation device and a shared buffer. The channel estimation device can also provide intermediate data to the shared buffer. The intermediate data may be in tile form and can be derived from the FFT symbol data. Further, the intermediate data can be stored in the shared buffer. The demapping device can extract the intermediate data from the shared buffer in various forms including sub-packet form.

摘要翻译： 一种在无线通信系统中可操作的装置，该装置可以包括FFT符号缓冲器和解映射装置。 FFT符号缓冲器可以将从接收到的通信信号导出的FFT符号数据馈送到信道估计装置和共享缓冲器。 信道估计装置还可以向共享缓冲器提供中间数据。 中间数据可以是瓦片形式，并且可以从FFT符号数据导出。 此外，中间数据可以存储在共享缓冲器中。 解映射设备可以以包括子包形式的各种形式从共享缓冲器提取中间数据。

公开(公告)号：US20110154170A1

公开(公告)日：2011-06-23

申请号：US12973792

申请日：2010-12-20

申请人： Raghu N. Challa ,  Thomas B. Wilborn ,  Supratik Bhattacharjee

发明人： Raghu N. Challa ,  Thomas B. Wilborn ,  Supratik Bhattacharjee

IPC分类号： H03M13/09 ,  G06F11/10

CPC分类号： H04L1/1635 ,  H03M13/09 ,  H03M13/2957 ,  H03M13/6525 ,  H04L1/0053 ,  H04L1/0061 ,  H04L1/06 ,  H04L1/1806 ,  H04L1/1829

摘要： Methods, apparatus and articles of manufacture are disclosed that provide for early termination based on transport block fail for acknowledgement bundling in time division duplex. In one embodiment, a method for operating a communication device is provided. In this embodiment, the communication device decodes a downlink subframe that is part of a bundle of subframes. If it detects a CRC failure in the subframe, it inhibits decoding of at least one other subframe in the bundle if present and reports the failure to the sending node. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules that allow a reader to quickly ascertain the disclosed subject matter. Therefore, it is to be understood that it should not be used to interpret or limit the scope or the meaning of the claims.

摘要翻译： 公开了基于传输块故障的提前终止的方法，装置和制品，用于在时分双工中进行确认捆绑。 在一个实施例中，提供了一种用于操作通信设备的方法。 在该实施例中，通信设备对作为一组子帧的一部分的下行链路子帧进行解码。 如果它检测到子帧中的CRC故障，则它阻止对捆绑中的至少一个其他子帧的解码（如果存在），并将该故障报告给发送节点。 本摘要仅用于遵守允许读者快速确定所披露的主题的抽象要求规则。 因此，应当理解，它不应用于解释或限制权利要求书的范围或含义。

公开(公告)号：US20090304116A1

公开(公告)日：2009-12-10

申请号：US12408603

申请日：2009-03-20

申请人： Raghu N. Challa ,  Hemanth Sampath ,  Gwendolyn D. Barriac

发明人： Raghu N. Challa ,  Hemanth Sampath ,  Gwendolyn D. Barriac

IPC分类号： H04L27/06

CPC分类号： H04L25/03019 ,  H04L2025/03426 ,  H04L2025/03726

摘要： An apparatus including a configurable demodulation architecture which includes a control module and a demodulation engine. The control module includes a set of one or more control fields. The demodulation engine includes a spatial whitening module, a Minimum Mean Square Estimation (MMSE) module, at least a first Maximal Ratio Combining (MRC) module, and at least one multiplexer. Further, the multiplexer is coupled to the instruction module and controlled based on the control fields to select at least one of the MMSE module or MRC module.

摘要翻译： 一种包括可配置解调架构的装置，其包括控制模块和解调引擎。 控制模块包括一组一个或多个控制域。 解调引擎包括空间白化模块，最小均方估计（MMSE）模块，至少第一最大比组合（MRC）模块和至少一个多路复用器。 此外，多路复用器耦合到指令模块并且基于控制字段来控制，以选择MMSE模块或MRC模块中的至少一个。

公开(公告)号：US08619928B2

公开(公告)日：2013-12-31

申请号：US12553848

申请日：2009-09-03

申请人： Farrokh Abrishamkar ,  Divaydeep Sikri ,  Raghu N. Challa ,  Bahadir Canpolat

发明人： Farrokh Abrishamkar ,  Divaydeep Sikri ,  Raghu N. Challa ,  Bahadir Canpolat

IPC分类号： H04B1/10

CPC分类号： H04L25/0328 ,  H04L25/0202 ,  H04L25/03286 ,  H04L25/03292 ,  H04L25/03299 ,  H04L2025/03726

摘要： A multi-stage interference suppression receiver includes a short equalizer section configured to operate on a first portion of a received signal received over a channel to produce a first equalized signal and a first estimate of the channel, a channel estimator section configured to operate on the first equalized signal to produce a second equalized signal, the channel estimator section comprising a linear estimator and a non-linear estimator, a long equalizer section configured to operate on a second portion of the received signal to produce a first estimate of symbols in the received signal and a second estimate of the channel and an interference canceller section configured to operate on the first estimate of symbols in the received signal to generate a second estimate of symbols in the received signal based on, at least in part, the second estimate of the channel.

摘要翻译： 多级干扰抑制接收机包括短均衡器部分，其被配置为对通过信道接收的接收信号的第一部分进行操作以产生第一均衡信号和信道的第一估计，信道估计器部分被配置为在 第一均衡信号以产生第二均衡信号，所述信道估计器部分包括线性估计器和非线性估计器，长均衡器部分，被配置为在所接收的信号的第二部分上进行操作，以产生接收到的符号的第一估计值 信号和信道的第二估计以及干扰消除器部分，被配置为在接收信号中对符号的第一估计进行操作，以至少部分地基于接收信号的第二估计来生成接收信号中的符号的第二估计 渠道。