公开(公告)号：US20220208802A1

公开(公告)日：2022-06-30

申请号：US17359636

申请日：2021-06-27

Applicant: Au Optronics Corporation

Inventor： Wen-Ching Sung ,  Wei-Hung Kuo

IPC: H01L27/12 ,  H01L25/16 ,  H01L21/311 ,  G03F7/00 ,  G03F7/16

Abstract: A display device and a manufacturing method thereof are provided. The display device includes a display area and a non-display area. The display device includes a substrate, an element layer, an electrode pattern layer, a photoresist pattern layer, and a light-emitting element. The element layer is disposed on the substrate. The electrode pattern layer is disposed on the element layer, and the electrode pattern layer includes multiple electrodes. The photoresist pattern layer is disposed on the electrode pattern layer, and the photoresist pattern layer includes a first photoresist pattern disposed corresponding to the display area and corresponding to the electrodes; a second photoresist pattern disposed corresponding to the non-display area and between the electrodes. The light-emitting element is disposed on the photoresist pattern layer and is electrically connected to the electrodes of the electrode pattern layer.

公开(公告)号：US10811441B2

公开(公告)日：2020-10-20

申请号：US16441024

申请日：2019-06-14

Applicant: Au Optronics Corporation

Inventor： Ming-Yao Chen ,  Kuo-Yu Huang ,  Wen-Ching Sung

IPC: H01L27/12

Abstract: A pixel array substrate including a substrate, an active device, a planarization layer, a first conductive layer, a first insulation layer and a second conductive layer is provided. The active device is disposed on the substrate. The planarization layer covers the active device and has a first opening. The first conductive layer is disposed on the planarization layer and is electrically connected with a first end of the active device. The first insulation layer is disposed on the first conductive layer. The second conductive layer is disposed on the first insulation layer. The first conductive layer and the second conductive layer cover a side surface of the first opening of the planarization layer.

公开(公告)号：US12218153B2

公开(公告)日：2025-02-04

申请号：US17359636

申请日：2021-06-27

Applicant: Au Optronics Corporation

Inventor： Wen-Ching Sung ,  Wei-Hung Kuo

IPC: H01L27/12 ,  G03F7/00 ,  G03F7/16 ,  H01L21/311 ,  H01L25/16 ,  H01L33/38

Abstract: A display device and a manufacturing method thereof are provided. The display device includes a display area and a non-display area. The display device includes a substrate, an element layer, an electrode pattern layer, a photoresist pattern layer, and a light-emitting element. The element layer is disposed on the substrate. The electrode pattern layer is disposed on the element layer, and the electrode pattern layer includes multiple electrodes. The photoresist pattern layer is disposed on the electrode pattern layer, and the photoresist pattern layer includes a first photoresist pattern disposed corresponding to the display area and corresponding to the electrodes; a second photoresist pattern disposed corresponding to the non-display area and between the electrodes. The light-emitting element is disposed on the photoresist pattern layer and is electrically connected to the electrodes of the electrode pattern layer.

公开(公告)号：US20200152662A1

公开(公告)日：2020-05-14

申请号：US16441024

申请日：2019-06-14

Applicant: Au Optronics Corporation

Inventor： Ming-Yao Chen ,  Kuo-Yu Huang ,  Wen-Ching Sung

IPC: H01L27/12

Abstract: A pixel array substrate including a substrate, an active device, a planarization layer, a first conductive layer, a first insulation layer and a second conductive layer is provided. The active device is disposed on the substrate. The planarization layer covers the active device and has a first opening. The first conductive layer is disposed on the planarization layer and is electrically connected with a first end of the active device. The first insulation layer is disposed on the first conductive layer. The second conductive layer is disposed on the first insulation layer. The first conductive layer and the second conductive layer cover a side surface of the first opening of the planarization layer.