公开(公告)号：US20140078100A1

公开(公告)日：2014-03-20

申请号：US13868098

申请日：2013-04-22

Applicant: AU OPTRONICS CORPORATION

Inventor： Yan-Yu Peng ,  Yu-Feng Chien

IPC: G06F3/045 ,  G01R27/00

CPC classification number: G06F3/045 ,  G01R27/00 ,  G06F3/041 ,  G06F2203/04103

Abstract: A touch panel includes a substrate, a touch device layer, a sensing circuit structure, and a planarization layer. The substrate includes a sensing region and a peripheral region that surrounds the sensing region. The touch device layer is disposed on the sensing region of the substrate. The sensing circuit structure is disposed on the peripheral region of the substrate, and the sensing circuit structure includes a plurality of sensing lines. The sensing lines are electrically connected to the touch device layer. The planarization layer is located on the substrate. Here, the planarization layer includes a color-resist material that has a dielectric coefficient ranging from about 3 to about 5, and the planarization layer covers the sensing lines located in the peripheral region.

Abstract translation: 触摸面板包括基板，触摸装置层，感测电路结构和平坦化层。 衬底包括感测区域和围绕感测区域的周边区域。 触摸装置层设置在基板的感测区域上。 感测电路结构设置在基板的周边区域上，感测电路结构包括多条检测线。 感测线电连接到触摸装置层。 平坦化层位于基板上。 这里，平坦化层包括介电系数为约3〜约5的耐光材料，平坦化层覆盖位于周边区域的感测线。

公开(公告)号：US09158425B2

公开(公告)日：2015-10-13

申请号：US13868098

申请日：2013-04-22

Applicant: Au Optronics Corporation

Inventor： Yan-Yu Peng ,  Yu-Feng Chien

IPC: G06F3/045 ,  G01R27/00 ,  G06F3/041

CPC classification number: G06F3/045 ,  G01R27/00 ,  G06F3/041 ,  G06F2203/04103

Abstract: A touch panel includes a substrate, a touch device layer, a sensing circuit structure, and a planarization layer. The substrate includes a sensing region and a peripheral region that surrounds the sensing region. The touch device layer is disposed on the sensing region of the substrate. The sensing circuit structure is disposed on the peripheral region of the substrate, and the sensing circuit structure includes a plurality of sensing lines. The sensing lines are electrically connected to the touch device layer. The planarization layer is located on the substrate. Here, the planarization layer includes a color-resist material that has a dielectric coefficient ranging from about 3 to about 5, and the planarization layer covers the sensing lines located in the peripheral region.

Abstract translation: 触摸面板包括基板，触摸装置层，感测电路结构和平坦化层。 衬底包括感测区域和围绕感测区域的周边区域。 触摸装置层设置在基板的感测区域上。 感测电路结构设置在基板的周边区域上，感测电路结构包括多条检测线。 感测线电连接到触摸装置层。 平坦化层位于基板上。 这里，平坦化层包括介电系数为约3〜约5的耐光材料，平坦化层覆盖位于周边区域的感测线。

公开(公告)号：US09001298B1

公开(公告)日：2015-04-07

申请号：US14077191

申请日：2013-11-11

Applicant: Au Optronics Corporation

Inventor： Yan-Yu Peng ,  Hsing-Lung Lee

IPC: G02F1/1343 ,  G02F1/1333

CPC classification number: G02F1/134363 ,  G02F2001/134372

Abstract: A pixel structure includes a scan line, a first insulation layer, a data line, a pixel electrode, a second insulation layer, and a common electrode. The scan line and the first insulation layer are disposed on a first substrate and the first insulation layer covers the scan line. The data line and the pixel electrode are disposed on the first insulation layer. The second insulation layer covers the data line and the pixel electrode and has a first opening located between the data line and the pixel electrode. The common electrode is disposed on the second insulation layer and has slits exposing a portion of the pixel electrode. The common electrode covers the data line and has a first extending portion filled in the first opening such that the first extending portion of the common electrode is located between the data line and the pixel electrode.

Abstract translation: 像素结构包括扫描线，第一绝缘层，数据线，像素电极，第二绝缘层和公共电极。 扫描线和第一绝缘层设置在第一基板上，第一绝缘层覆盖扫描线。 数据线和像素电极设置在第一绝缘层上。 第二绝缘层覆盖数据线和像素电极，并且具有位于数据线和像素电极之间的第一开口。 公共电极设置在第二绝缘层上并且具有暴露像素电极的一部分的狭缝。 公共电极覆盖数据线，并且具有填充在第一开口中的第一延伸部分，使得公共电极的第一延伸部分位于数据线和像素电极之间。

公开(公告)号：US20150077691A1

公开(公告)日：2015-03-19

申请号：US14077191

申请日：2013-11-11

Applicant: Au Optronics Corporation

Inventor： Yan-Yu Peng ,  Hsing-Lung Lee

IPC: G02F1/1333 ,  G02F1/1343

CPC classification number: G02F1/134363 ,  G02F2001/134372

Abstract: A pixel structure includes a scan line, a first insulation layer, a data line, a pixel electrode, a second insulation layer, and a common electrode. The scan line and the first insulation layer are disposed on a first substrate and the first insulation layer covers the scan line. The data line and the pixel electrode are disposed on the first insulation layer. The second insulation layer covers the data line and the pixel electrode and has a first opening located between the data line and the pixel electrode. The common electrode is disposed on the second insulation layer and has slits exposing a portion of the pixel electrode. The common electrode covers the data line and has a first extending portion filled in the first opening such that the first extending portion of the common electrode is located between the data line and the pixel electrode.

Abstract translation: 像素结构包括扫描线，第一绝缘层，数据线，像素电极，第二绝缘层和公共电极。 扫描线和第一绝缘层设置在第一基板上，第一绝缘层覆盖扫描线。 数据线和像素电极设置在第一绝缘层上。 第二绝缘层覆盖数据线和像素电极，并且具有位于数据线和像素电极之间的第一开口。 公共电极设置在第二绝缘层上并且具有暴露像素电极的一部分的狭缝。 公共电极覆盖数据线，并且具有填充在第一开口中的第一延伸部分，使得公共电极的第一延伸部分位于数据线和像素电极之间。