公开(公告)号：US20180183455A1

公开(公告)日：2018-06-28

申请号：US15849220

申请日：2017-12-20

Applicant: Avnera Corporation

Inventor： Wai Lee ,  Jianping Wen ,  Garry N. Link ,  Jian Li

IPC: H03M1/46 ,  H03M1/12 ,  H03M1/10

CPC classification number: H03M1/462 ,  H03M1/0863 ,  H03M1/1019 ,  H03M1/1061 ,  H03M1/1215 ,  H03M1/1245 ,  H03M1/129 ,  H03M1/466 ,  H03M1/468

Abstract: The disclosure includes an analog to digital converter (ADC). The ADC includes a successive approximation register (SAR) unit including one or more capacitive networks. The capacitive networks take a sample of an analog signal. The SAR also includes a comparator to approximate digital values based on the analog signal sample via successive comparison. The ADC includes a preamplifier coupled to the SAR unit. The preamplifier amplifies the analog signal for application to the capacitive networks for sampling. The ADC also includes a rough buffer coupled to the SAR unit. The rough buffer pre-charges the capacitive networks of the SAR unit prior to application of the analog signal from the preamplifier.