公开(公告)号：US20180218530A1

公开(公告)日：2018-08-02

申请号：US15420376

申请日：2017-01-31

申请人： BALAJI VEMBU ,  ALTUG KOKER ,  DAVID PUFFER ,  MURALI RAMADOSS ,  BRYAN R. WHITE ,  HEMA C. NALLURI ,  ADITYA NAVALE

发明人： BALAJI VEMBU ,  ALTUG KOKER ,  DAVID PUFFER ,  MURALI RAMADOSS ,  BRYAN R. WHITE ,  HEMA C. NALLURI ,  ADITYA NAVALE

IPC分类号： G06T15/00 ,  G06T15/80 ,  G06F9/455

CPC分类号： G06F9/45558 ,  G06F9/45541 ,  G06F9/5005

摘要： An apparatus and method are described for fine grained sharing of graphics processing resources for example, one embodiment of a graphics processing apparatus comprises: a plurality of command buffers to store work elements from a plurality of virtual machines or applications, each work element indicating a command to be processed by graphics hardware and data identifying the virtual machine or application which generated the work element; a plurality of doorbell registers or memory regions, each doorbell register or memory region associated with a particular virtual machine or application, a virtual machine or application to store an indication in its doorbell register or memory region when it has stored a work element to a command buffer; and a work scheduler to read a work element from a command buffer responsive to detecting an indication in a doorbell register, the work scheduler to combine work elements from multiple virtual machines or applications in a submission to a graphics engine, the graphics engine to execute a work element using the data identifying a virtual machine or application associated with the work element, wherein different graphics engines are configured to simultaneously execute workloads belonging to different virtual machines or applications.

公开(公告)号：US20190066354A1

公开(公告)日：2019-02-28

申请号：US15692951

申请日：2017-08-31

申请人： HEMA C. NALLURI ,  BALAJI VEMBU ,  PETER L. DOYLE ,  MICHAEL APODACA ,  JEFFERY S. BOLES

发明人： HEMA C. NALLURI ,  BALAJI VEMBU ,  PETER L. DOYLE ,  MICHAEL APODACA ,  JEFFERY S. BOLES

IPC分类号： G06T15/00 ,  G06T17/10 ,  G06T7/507 ,  G06T15/30 ,  G06T1/60

摘要： An apparatus and method are described for culling commands in a tile-based renderer. For example, one embodiment of an apparatus comprises: a command buffer to store a plurality of commands to be executed by a render pipeline to render a plurality of tiles; visibility analysis circuitry to determine per-tile visibility information for each of the plurality of tiles and to store the visibility information for a first tile in a first storage, the visibility information specifying either that all of the commands associated with rendering the first tile can be skipped or identifying individual commands associated with rendering the first tile that can be skipped; and a render pipeline to read the visibility information from the first storage to determine whether to execute or skip one or more of the commands from the command buffer to render the first tile.