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公开(公告)号:US20250044494A1
公开(公告)日:2025-02-06
申请号:US18720591
申请日:2021-12-20
Inventor: Wei DONG , Shijun ZHAO , Jun WANG
IPC: F21V8/00
Abstract: A light guide plate and a backlight module, including: a light incident surface; a first side surface, the first side surface arranged opposite the light incident surface; a light exiting surface connecting the light incident surface and the first side surface; a bottom surface arranged opposite the light exiting surface, where the bottom surface connects with the light incident surface and the first lateral surface; a second side surface connecting the light incident surface, the first side surface, the bottom surface and the light exiting surface; a third side surface arranged opposite the second side surface, and the third side surface connects with the light incident surface, the first side surface, the bottom surface and the light exiting surface. The bottom surface has a plurality of strip-shaped concave structures, and at least one convex structure protruding outwards from the bottom surface is provided between adjacent concave structures.
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公开(公告)号:US20240347016A1
公开(公告)日:2024-10-17
申请号:US18579433
申请日:2023-01-03
Inventor: Qing LI , Panhui ZHAO , Liugang ZHOU , Ke DAI , Jun WANG , Jianwei SUN , Yunyun LIANG , Yanting HUANG , Yu QUAN , Yunlu CHEN , Zhengru PAN , Jiantao LIU
IPC: G09G3/36
CPC classification number: G09G3/3607 , G09G3/3688 , G09G2310/08 , G09G2320/0257 , G09G2320/0271
Abstract: A method for driving a display panel and a display device, the method includes: acquiring an original grayscale value of each sub-pixel in an mth row and a target grayscale value corresponding to a data voltage input to each sub-pixel in an (m−1)th row m being an integer greater than 1; if, in a same column, the original grayscale value of the sub-pixel in the mth row is larger than the target grayscale value corresponding to the data voltage input to the sub-pixel in the (m−1)th row, determining a target grayscale value of each sub-pixel in the mth row according to the original grayscale value of the sub-pixel in the mth row and the target grayscale value of the sub-pixel in the (m−1)th row inputting a data voltage to a data line in the display panel according to the target grayscale value of each sub-pixel in the mth row.
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公开(公告)号:US20240122032A1
公开(公告)日:2024-04-11
申请号:US17637817
申请日:2021-04-21
Inventor: Qinghe WANG , Bin ZHOU , Tongshang SU , Dacheng ZHANG , Jun WANG , Ning LIU , Yongchao HUANG , Jun CHENG , Liangchen YAN
CPC classification number: H10K59/80517 , H10K59/1201 , H10K59/80522 , H10K59/8731
Abstract: A display substrate including a drive-circuit layer and a light-emitting structure layer, a preparation method thereof, and a display device, the light-emitting structure layer includes an anode, a pixel definition layer, an organic light-emitting layer and a cathode, and an auxiliary electrode and an organic light-emitting block, arranged sequentially, the pixel definition layer includes an anode opening exposing the anode and an electrode opening exposing the auxiliary electrode, the organic light-emitting block is separated from the organic light-emitting layer, the auxiliary electrode includes the first, second and third auxiliary electrodes arranged sequentially; the cathode includes a first horizontal lapping part lapping with the first auxiliary electrode and a second sidewall lapping part lapping with the second auxiliary electrode, the thickness of the second sidewall lapping part in the direction parallel to the substrate is greater than that of the first horizontal lapping part in the direction perpendicular to the substrate.
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4.
公开(公告)号:US20230086999A1
公开(公告)日:2023-03-23
申请号:US17801003
申请日:2021-10-12
Inventor: Tongshang SU , Jun CHENG , Bin ZHOU , Ce ZHAO , Qinghe WANG , Jun WANG , Liangchen YAN
Abstract: Provided are a gate driving circuit and a manufacturing method therefor, an array substrate, and a display device, relating to the technical field of display. At least one transistor in the gate driving circuit comprises a first light-shielding layer made of an electrically conductive material, and the first light-shielding layer is connected to a first gate metal layer of the transistor, such that two electrically conductive channels are formed, and the ON-state current is increased, thereby effectively suppressing negative drift of a threshold voltage.
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公开(公告)号:US20220173125A1
公开(公告)日:2022-06-02
申请号:US17349164
申请日:2021-06-16
Inventor: Haitao WANG , Jun CHENG , Ming WANG , Qinghe WANG , Jun WANG , Tongshang SU
Abstract: The disclosure discloses an array substrate and a preparation method thereof, a display panel and a display device. The array substrate includes: a substrate, and a first metal layer, a metal oxide layer and a second metal layer which are sequentially stacked and isolated from each other on the substrate; the first metal layer includes a light shading metal, a first electrode, and an anti-static line; the metal oxide layer includes a first active layer; the second metal layer includes a gate line and a second electrode; the gate line is connected with the anti-static line through a first TFT, one of the first electrode and the second electrode forms the source and drain electrodes of the first TFT, and the other forms the gate electrode of the first TFT; and the source is electrically connected with the gate line, and the drain is electrically connected with the anti-static line.
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公开(公告)号:US20220057679A1
公开(公告)日:2022-02-24
申请号:US17241140
申请日:2021-04-27
Inventor: Maokun TIAN , Zhonghao HUANG , Xu WU , Chengjun QI , Jun WANG , Dan LIU
IPC: G02F1/1362 , H01L27/12
Abstract: An array substrate includes a base substrate, a light-shielding pattern, a buffer pattern, an active layer, a gate insulating layer and a first passivation layer provided with a first via, a second via and a third via, and a source and a drain. An entire orthographic projection of the active layer on the base substrate coincides with an orthographic projection of at least part of the buffer pattern on the base substrate. The orthographic projection of the buffer pattern on the base substrate is within a border of an orthographic projection of the light-shielding pattern on the base substrate, and its area is less than an area of the orthographic projection of the light-shielding pattern on the base substrate. One of the source and the drain is coupled to the active layer through the first via, and another one is coupled to the active layer through the second via and the light-shielding pattern through the third via.
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公开(公告)号:US20210225775A1
公开(公告)日:2021-07-22
申请号:US16767445
申请日:2019-12-26
Inventor: Runmin TANG , Jun WANG , Zhantao WANG , Junlong WANG , Xing REN
IPC: H01L23/544 , H01L21/68 , H01L51/56 , G06T7/00 , G06T7/73
Abstract: The present disclosure provides a substrate, an alignment method and an alignment device. The substrate includes an alignment mark and an auxiliary alignment mark. A shape of the auxiliary alignment mark is different from a shape of the substrate alignment mark.
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公开(公告)号:US20210012699A1
公开(公告)日:2021-01-14
申请号:US16908283
申请日:2020-06-22
Inventor: Zhenlin QU , Liugang ZHOU , Ke DAI , Tao LI , Yulong XIONG , Yizhan HAN , Jianwei SUN , Liu HE , Yunyun LIANG , Jun WANG , Qing LI , Xutong CHEN , Liwei ZHOU , Xiaofeng YIN
Abstract: The preset disclosure provides a display control method, a timing controller IC and a display device. The method includes: acquiring a preset grayscale voltage of a target pixel unit and a backlight brightness of a backlight region corresponding to the target pixel unit, in a current output display frame; outputting a first grayscale voltage to the target pixel unit if the backlight brightness of the corresponding backlight region is less than or equal to a first preset brightness value; outputting a second grayscale voltage to the target pixel unit if the backlight brightness of the corresponding backlight region is greater than the first preset brightness value; wherein the second grayscale voltage is greater than the first grayscale voltage, and both the second grayscale voltage and the first grayscale voltage are greater than the preset grayscale voltage.
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9.
公开(公告)号:US20200152799A1
公开(公告)日:2020-05-14
申请号:US16506216
申请日:2019-07-09
Inventor: Guangyao LI , Lei HUANG , Haitao WANG , Jun WANG , Qinghe WANG , Wei LI , Dongfang WANG , Liangchen YAN
IPC: H01L29/786 , G01N27/00 , H01L29/66 , H01L27/12
Abstract: The present disclosure provides a thin film transistor, a thin film transistor array, and a method for detecting an object to be detected, wherein the thin film transistor is configured to detect a parameter of an object to be detected bound with a metal ion and includes an active layer, wherein: a carrier of the active layer without a metal element contained in the metal ion bound is of a first mobility, and a carrier of the active layer with the metal element bound is of a second mobility different from the first mobility.
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公开(公告)号:US20200075704A1
公开(公告)日:2020-03-05
申请号:US16456619
申请日:2019-06-28
Inventor: Jun LIU , Liangchen YAN , Bin ZHOU , Jun WANG , Tongshang SU , Biao LUO , Yang ZHANG
Abstract: An array substrate includes a base substrate, a transistor on the base substrate, a planarization layer on a side of the transistor away from the base substrate, a recessed portion on the planarization layer, and a light blocking portion in the recessed portion. The light blocking portion is configured to prevent a light from being incident upon an active layer.
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