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1.发明申请公开(公告)号：US20180240393A1
公开(公告)日：2018-08-23
申请号：US15712429
申请日：2017-09-22
发明人： Hui ZHANG , Seung-Woo Han , Yun-Sik Im , Shunhang Zhang , Mingfu Han
IPC分类号： G09G3/20 , H01L27/12 , H01L29/786
CPC分类号： G09G3/2092 , G09G2300/0408 , G09G2300/0426 , G09G2310/0221 , G09G2320/0233 , G09G2320/0686 , G09G2330/021 , G09G2330/028 , H01L27/124 , H01L29/42384 , H01L29/78636 , H01L29/78648
摘要： An array substrate includes a display region including at least two partitions. The array substrate includes a gate driving circuit, first gate electrodes and second gate electrodes. The gate driving circuit is configured to, while inputting a first voltage to the respective first gate electrodes for turning on corresponding thin film transistors according to normal timing, selectively input, to all the second gate electrodes in at least one of the partitions, a second voltage for turning off or turning on all thin film transistors in the partition.
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2.发明授权公开(公告)号：US10235919B2
公开(公告)日：2019-03-19
申请号：US15577402
申请日：2017-05-03
发明人： Guangliang Shang , Xing Yao , Mingfu Han , Seung-Woo Han , Yun-Sik Im , Jing Lv , Yinglong Huang , Jung-Mok Jun , Xue Dong , Haoliang Zheng , Lijun Yuan , Zhichong Wang , Ji Ha Kim
摘要： A GOA signal determining circuit and method thereof, gate driver circuit, and display device are provided. The GOA signal determining circuit is connected to an input end of a GOA unit, at least two clock signal ends of the GOA unit, and a control end of a reset unit of a PU node in the GOA unit. The GOA signal determining circuit detects a signal of the input end of the GOA unit and a signal of the at least two clock signal ends of the GOA unit, and outputs a control signal to the reset unit of the PU node to control the reset unit to output a reset signal to the PU node to turn off an output transistor of the GOA unit, upon determining both of the signal of the input end and the signal of the at least two clock signal ends are abnormal.
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