公开(公告)号：US20240241542A1

公开(公告)日：2024-07-18

申请号：US17925658

申请日：2021-12-20

Applicant: BOE Technology Group Co., Ltd.

Inventor： Deshuai Wang ,  Jian Sun ,  Zhen Wang ,  Yue Shan ,  Wei Yan ,  Jian Zhang ,  Han Zhang ,  Wenwen Qin ,  Yadong Zhang ,  Xiaoyan Yang ,  Keyan Liu ,  Hong Liu

IPC: G06F1/16

CPC classification number: G06F1/1643 ,  G06F1/1639 ,  G06F1/1658

Abstract: A display panel includes: a base substrate including a display region and a fan-out region, and the fan-out region is located between the display region and a chip; a plurality of data wires/touch wires located in the fan-out region for respectively electrically connecting a plurality of data lines/touch signal lines with the chip. A portion of the plurality of data wires is located in a first conductive layer while a rest portion thereof is located in the second conductive layer. A portion of the plurality of touch wires is located in at least one of the first conductive layer and the second conductive layer while a rest portion thereof is located in the third conductive layer. A pitch between any two adjacent wires in the first/second/third conductive layer is a first/second/third wire pitch, respectively. The first wire pitch and the second wire pitch are smaller than the third wire pitch.

公开(公告)号：US12140999B2

公开(公告)日：2024-11-12

申请号：US17925658

申请日：2021-12-20

Applicant: BOE Technology Group Co., Ltd.

Inventor： Deshuai Wang ,  Jian Sun ,  Zhen Wang ,  Yue Shan ,  Wei Yan ,  Jian Zhang ,  Han Zhang ,  Wenwen Qin ,  Yadong Zhang ,  Xiaoyan Yang ,  Keyan Liu ,  Hong Liu

IPC: G06F1/16

Abstract: A display panel includes: a base substrate including a display region and a fan-out region, and the fan-out region is located between the display region and a chip; a plurality of data wires/touch wires located in the fan-out region for respectively electrically connecting a plurality of data lines/touch signal lines with the chip. A portion of the plurality of data wires is located in a first conductive layer while a rest portion thereof is located in the second conductive layer. A portion of the plurality of touch wires is located in at least one of the first conductive layer and the second conductive layer while a rest portion thereof is located in the third conductive layer. A pitch between any two adjacent wires in the first/second/third conductive layer is a first/second/third wire pitch, respectively. The first wire pitch and the second wire pitch are smaller than the third wire pitch.