公开(公告)号：US20210225972A1

公开(公告)日：2021-07-22

申请号：US16099499

申请日：2017-09-29

Applicant: BOE Technology Group Co., Ltd. ,  Beijing BOE Display Technology Co., Ltd.

Inventor： Lianjie Qu ,  Xiaogai Chun ,  Xue Gao ,  Hebin Zhao ,  Guangdong Shi ,  Shuai Liu ,  Yonglian Qi ,  Bingqiang Gui

IPC: H01L27/32

Abstract: The present application discloses an array substrate, a display apparatus and a method of fabricating an array substrate. The array substrate has a plurality of first bottom-gate type thin film transistors each of which including a metal oxide active layer and a plurality of second bottom-gate type thin film transistors each of which including a silicon active layer.

公开(公告)号：US11233106B2

公开(公告)日：2022-01-25

申请号：US16099499

申请日：2017-09-29

Applicant: BOE Technology Group Co., Ltd. ,  Beijing BOE Display Technology Co., Ltd.

Inventor： Lianjie Qu ,  Xiaogai Chun ,  Xue Gao ,  Hebin Zhao ,  Guangdong Shi ,  Shuai Liu ,  Yonglian Qi ,  Bingqiang Gui

IPC: H01L27/32

Abstract: The present application discloses an array substrate, a display apparatus and a method of fabricating an array substrate. The array substrate has a plurality of first bottom-gate type thin film transistors each of which including a metal oxide active layer and a plurality of second bottom-gate type thin film transistors each of which including a silicon active layer.

公开(公告)号：US10050151B2

公开(公告)日：2018-08-14

申请号：US15276339

申请日：2016-09-26

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jing Niu ,  Xiaogai Chun

IPC: H01L27/14 ,  H01L21/00 ,  H01L21/84 ,  H01L29/786 ,  H01L27/12 ,  H01L29/66

Abstract: A dual-gate TFT array substrate and manufacturing method thereof and a display device are provided. The manufacturing method includes: forming a common electrode and a top-gate electrode through one patterning process. The manufacturing method reduces the times of patterning process and simplifies the process flow.

公开(公告)号：US20170213916A1

公开(公告)日：2017-07-27

申请号：US15276339

申请日：2016-09-26

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jing Niu ,  Xiaogai Chun

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1262 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78648

Abstract: A dual-gate TFT array substrate and manufacturing method thereof and a display device are provided. The manufacturing method includes: forming a common electrode and a top-gate electrode through one patterning process. The manufacturing method reduces the times of patterning process and simplifies the process flow.