Abstract:
A processing circuit of a display panel, a display method and a display device are provided. The display panel is divided into a plurality of display regions. The processing circuit includes: a plurality of display control circuits corresponding to the plurality of display regions respectively; a sight line acquisition circuit configured to acquire a focused region of the display panel on which sight lines of human eyes are focused; and a control circuit configured to determine from the plurality of display regions a first display region overlapping the focused region and a second display region not overlapping the focused region, enable the display control circuit corresponding to the first display region to output first image data, and enable the display control circuit corresponding to the second display region to output second image data having a refresh rate smaller than the first image data.
Abstract:
A display device includes a first gate driver configured to sequentially supply gate scan signals to gate lines in a first subset in response to a first timing signal, a second gate driver configured to sequentially supply gate scan signals to gate lines in a second subset in response to a second timing signal, the first subset of gate lines and the second subset of gate lines are alternately arranged, and a signal controller configured to supply respectively the first and second timing signals that are synchronized with each other to the first and second gate drivers in response to receiving an indication of a first resolution mode, and further configured to supply respectively the first and second timing signals that are time-shifted relative to each other to the first and second gate drivers in response to receiving an indication of a second resolution mode.
Abstract:
A gate drive circuit and a display panel are provided. The gate drive circuit controls, by adding a control module, the potential at a key node of an output module in a touch-control phase, that is, outputting a low-level signal of a signal switching end to a first node of the output module of the current-stage shift register in the touch-control phase, so as to stabilise the potential of the key node, i.e. the first node in the touch-control phase, thereby avoiding the case where the potential at the key node is in a floating state and thus is capacitively coupled and deviates from a stable potential; and a transition to a display stage before the touch-control state ends is made, and a high-level signal of the signal switching end is output to the first node, so as to pull up the potential at the first node.
Abstract:
The present disclosure provides a processing circuit of a display panel, a display method and a display device. The processing circuit includes: a line-of-sight acquisition module configured to track an eyeball of each eye, to determine a concern region of line of sight on the display panel and a region other than the concern region; a control module configured to acquire original image data of an image to be displayed on the display panel, subject first original image data corresponding to the concern region and/or second original image data corresponding to the other region to treatment, and output first image generation data corresponding to the concern region and second image generation data corresponding to the other region and having a resolution smaller than the first image generation data; and a display signal output module configured to output a display signal to the display panel in accordance with the first image generation data and the second image generation data.
Abstract:
The present disclosure provides a display device, a control circuit of a display panel, and a display method. The display method includes: determining a current display mode of the display panel; and determining whether or not to subject a to-be-displayed image on the display panel to color enhancement in accordance with the current display mode of the display panel and/or an image parameter of the to-be-displayed image.
Abstract:
A shift register unit and a driving method thereof, a gate driving circuit and a display apparatus. The shift register unit includes an input circuit, a first pull-down circuit, a second pull-down circuit, and an output circuit. In a first state, the first pull-down circuit is configured to pull down the level of a pull-up node, and the second pull-down circuit is configured to pull down a level of the output terminal.
Abstract:
A shift register, a gate driving circuit, a display screen and a method for driving the display screen are proposed. A first and/or a second node control unit are incorporated. The first node control unit controls a first node according to a first control signal to put a pulling-up unit in an OFF state; the second node control unit controls a second node according to a second control signal to put a pulling-down unit in an OFF state. During the period that the display screen is powered off, the level at the driving signal output terminal is prevented from being affected by the pulling-up unit through the first node control unit and by the pulling-down unit through the second node control unit, such that thin film transistors connected to a gate line corresponding to the shift register are all turned on and thus accumulated charges can be released rapidly.
Abstract:
A display device is provided, and the display device includes an array substrate including a display zone thin film transistor situated in a display zone; a driving device including a charging current acquiring device, which is used for acquiring a charging current of the display zone thin film transistor, and includes a detecting thin film transistor with the same construction as the display zone thin film transistor. A driving method and a manufacturing method of the array substrate are also provided.
Abstract:
A scan driving circuit and a driving method thereof, an array substrate and a display device are provided. The scan driving circuit includes a scan signal generating circuit, a plurality of scan lines and a plurality of switching circuits. The scan signal generating circuit includes a plurality of output terminals for respectively outputting scan signals; the plurality of scan lines respectively correspond to the plurality of output terminals of the scan signal generating circuit and are divided into a plurality of scan line groups, and each of the plurality of scan line groups includes at least two scan lines; the plurality of switching circuits respectively correspond to the plurality of scan line groups and are respectively disposed between the plurality of scan line groups and the plurality of output terminals.
Abstract:
A shift register comprises: a first generation circuit generating a first clock signal and providing the same to a shift register logic circuit; a second generation circuit generating a second clock signal and providing the same to the shift register logic circuit; and a first control signal terminal (EN1), a second control signal terminal (EN2), a third control signal terminal (EN3) and a fourth control signal terminal (EN4) providing controls to ensure that the first clock signal and the second clock signal are out of phase to each other, and the clock signals can have different frequencies at different time intervals.