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公开(公告)号：US10254602B2
公开(公告)日：2019-04-09
申请号：US15519648
申请日：2016-11-07
发明人： Jinhu Cao , Minghui Ma , Jiaxin Yu , Fengwu Yu , Bin Cao , Namin Kwon , Wei Li , Zhi Li , Xinlei Cao , Enke Guo
IPC分类号： G02F1/1345 , H01L27/12 , G09G3/00 , G09G3/36 , G02F1/1362
摘要： In some embodiments, an array substrate motherboard and a fabricating method thereof are provided. The method includes: providing a substrate including multiple gate lines, gate driving leads, data lines, and data driving leads, each gate line corresponds to one gate driving lead, each data line corresponds to one data driving lead; forming multiple gate line testing leads, each gate line testing lead is connected with a gate driving lead; forming multiple data line testing leads, each data line testing lead is connected with a subset of the multiple data driving leads; forming multiple gate line testing pads, each gate line testing pad is connected with a gate line testing lead; forming multiple data line testing pads, each data line testing pad is connected with two data line testing leads; and using the gate line testing pads and gate line testing pads to test the gate lines and data lines.
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公开(公告)号：US10107360B2
公开(公告)日：2018-10-23
申请号：US15152126
申请日：2016-05-11
发明人： Wensong Wang , Jinwei Zhu , Zhirui He , Sunwu Xie , Namin Kwon
IPC分类号： F16G3/08
摘要： A conveyor belt driving device. The conveyor belt connecting device has: a connecting body provided with a clamping space; a positioning structure with a positioning face, wherein a segment to be connected of a conveyor belt is oppositely abuts against the positioning face, and the segment to be connected of the conveyor belt and the positioning structure are simultaneously provided in the clamping space; and a fixing element penetrating through the connecting body and pressed against the positioning structure, wherein the segment to be connected and the positioning structure are fixed in the clamping space of the connecting body by the pressing of the fixing element.
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公开(公告)号：US10558101B2
公开(公告)日：2020-02-11
申请号：US16274526
申请日：2019-02-13
发明人： Jinhu Cao , Minghui Ma , Jiaxin Yu , Fengwu Yu , Bin Cao , Namin Kwon , Wei Li , Zhi Li , Xinlei Cao , Enke Guo
IPC分类号： G02F1/1362 , G02F1/1368 , H01L21/66
摘要： An array substrate motherboard includes a substrate including a plurality of gate lines, a plurality of gate line driving leads, a plurality of data lines, and a plurality of data line driving leads; a plurality of gate line testing leads; a plurality of data line testing leads and a plurality of data line driving leads; a plurality of gate line testing pads; a plurality of data line testing pads; and an insulating layer arranged between the data line testing leads and the data line driving leads in the trimming region. A respective one of the plurality of data line testing pads is connected with a respective one of the plurality of data line testing leads. A respective one of the plurality of data line driving leads is connected with one of the plurality of data line testing leads that penetrate through the insulating layer.
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公开(公告)号：US10255833B2
公开(公告)日：2019-04-09
申请号：US15136085
申请日：2016-04-22
发明人： Wei Li , Yo Seop Cheong , Namin Kwon , Minghui Ma , Jinhu Cao , Xin Wang
IPC分类号： G01R31/317 , G09G3/00 , G01R1/04
摘要： A light-on module testing device, a method for testing a light-on module and a method for testing a display panel are disclosed. The light-on module testing device includes a base, a support element disposed on the base, and a test platform disposed on the base, wherein an arm is disposed on the support element, and the arm is configured to fix a light-on module to be tested, and a tester is disposed on the test platform and the tester has a signal output end.
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公开(公告)号：US09921446B2
公开(公告)日：2018-03-20
申请号：US15227208
申请日：2016-08-03
发明人： Fengwu Yu , Jinhu Cao , Minghui Ma , Bin Cao , Namin Kwon , Yanyan Wu , Wei Li , Mian Gao , Long Guo
IPC分类号： G02F1/1362 , G01R31/02 , G02F1/1368
CPC分类号： G02F1/136259 , G01R31/025 , G02F1/1309 , G02F1/136286 , G02F1/1368 , G02F2001/136263
摘要： The present application discloses a display panel test structure for testing whether signal lines of a display panel are defective, the signal lines at least comprising a plurality of data lines which are divided into N groups, the display panel test structure comprising N first shorting bars arranged in a test area of the display panel, each of which being configured to short-circuit a group of data lines, wherein the display panel test structure further comprises a plurality of first test pads arranged in the test area, each of which connects with one shorting bar corresponding thereto, and each of the first test pads is configured to load a signal to a group of data lines corresponding thereto during a test.
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公开(公告)号：US20170089425A1
公开(公告)日：2017-03-30
申请号：US15152126
申请日：2016-05-11
发明人： Wensong WANG , Jinwei ZHU , Zhirui HE , Sunwu XIE , Namin Kwon
IPC分类号： F16G3/08
CPC分类号： F16G3/08
摘要： The present disclosure provides a conveyor belt connecting device and a conveyor belt driving device. The conveyor belt connecting device comprises: a connecting body provided with a clamping space; a positioning structure comprising a positioning face, wherein a segment to be connected of a conveyor belt is oppositely abuts against the positioning face, and the segment to be connected of the conveyor belt and the positioning structure are simultaneously provided in the clamping space; and a fixing element penetrating through the connecting body and pressed against the positioning structure, wherein the segment to be connected and the positioning structure are fixed in the clamping space of the connecting body by means of the pressing of the fixing element.
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7.发明授权公开(公告)号：US11131893B2
公开(公告)日：2021-09-28
申请号：US16761830
申请日：2019-11-12
发明人： Yi Ouyang , Bingyang Yu , Jinwei Zhu , Namin Kwon , Guibing Wang , Tongju Bai , Zhirui He , Bin Yang , Qun Liu , Guobin Xue
IPC分类号： G02F1/1362 , G02F1/1368
摘要： Disclosed is a display substrate including a base substrate, and gate lines, data lines, common electrode lines and common electrodes on the base substrate; the gate lines and the data lines intersect to define pixel areas; the common electrodes are located in the pixel areas; the gate lines and the common electrode lines are alternately arranged one by one; each common electrode lines includes target wire segments and non-target wire segments, the target wire segments are wire segments where the common electrode lines and the data lines intersect, and the non-target wire segments are wire segments on the common electrode line except the target wire segments; and for each common electrode line, a distance between any position point on the target wire segment and a target gate line is less than a distance between the non-target wire segment and the target gate line.
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8.发明申请公开(公告)号：US20210223649A1
公开(公告)日：2021-07-22
申请号：US16761830
申请日：2019-11-12
发明人： Yi Ouyang , Bingyang Yu , Jinwei Zhu , Namin Kwon , Guibing Wang , Tongju Bai , Zhirui He , Bin Yang , Qun Liu , Guobin Xue
IPC分类号： G02F1/1362 , G02F1/1368
摘要： Disclosed is a display substrate including a base substrate, and gate lines, data lines, common electrode lines and common electrodes on the base substrate; the gate lines and the data lines intersect to define pixel areas; the common electrodes are located in the pixel areas; the gate lines and the common electrode lines are alternately arranged one by one; each common electrode lines includes target wire segments and non-target wire segments, the target wire segments are wire segments where the common electrode lines and the data lines intersect, and the non-target wire segments are wire segments on the common electrode line except the target wire segments; and for each common electrode line, a distance between any position point on the target wire segment and a target gate line is less than a distance between the non-target wire segment and the target gate line.
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