Touch substrate, method of driving the same and touch display device

    公开(公告)号:US11281327B2

    公开(公告)日:2022-03-22

    申请号:US16641397

    申请日:2019-07-25

    IPC分类号: G06F3/041 G06F3/044 G06K9/00

    摘要: A touch substrate, a method of driving the same, and a touch display device are provided, and the touch substrate includes: a plurality of emitting electrode patterns arranged along a first direction, wherein the emitting electrode patterns includes an emitting electrode sub-pattern or a plurality of electrically connected emitting electrode sub-patterns; a plurality of first receiving electrode patterns arranged along a Y-direction, wherein the first receiving electrode patterns includes a plurality of electrically connected first receiving electrode sub-patterns; a plurality of second receiving electrode patterns arranged along an X-direction and insulated from the first receiving electrode pattern, and the second receiving electrode pattern includes a plurality of second receiving electrode sub-patterns electrically connected in sequence; the first direction intersecting both the X-direction and the Y-direction.

    Shift register and driving method thereof, gate driving circuit and display device

    公开(公告)号:US11132927B2

    公开(公告)日:2021-09-28

    申请号:US16303853

    申请日:2018-05-25

    IPC分类号: G09G3/20 G11C19/28 G06F3/041

    摘要: A shift register, including: a first input circuit configured to supply a first reference signal of a first reference signal terminal to the pull-up node under control of an input signal of the input signal terminal; a pull-up node state maintaining circuit configured to supply a third reference signal of the third reference signal terminal to the pull-up node when the potential of the pull-up node is a first potential, and supply a fourth reference signal of the fourth reference signal terminal to the pull-up node when the potential of the pull-up node is a second potential; and an output circuit configured to output a first clock signal of the first clock signal terminal to the gate signal output terminal under control of the potential of the pull-up node.

    Touch Panel and Display Device
    5.
    发明申请

    公开(公告)号:US20170235389A1

    公开(公告)日:2017-08-17

    申请号:US15234096

    申请日:2016-08-11

    IPC分类号: G06F3/044

    摘要: A touch panel and a display device are disclosed. The touch panel includes a base substrate and a touch layer located on the substrate, the touch layer includes a plurality of touch unit sets, each of which includes two touch units, and each of the touch units has a first side, a second side and a third side that are connected head-to-tail; the length ratio of the first side to the second side is from 1:3 to 1:4; two touch units of each touch unit set have their third sides face each other.

    DISPLAY PANEL AND FLAT PANEL DISPLAY APPARATUS
    6.
    发明申请
    DISPLAY PANEL AND FLAT PANEL DISPLAY APPARATUS 有权
    显示面板和平板显示设备

    公开(公告)号:US20160260370A1

    公开(公告)日:2016-09-08

    申请号:US14744088

    申请日:2015-06-19

    IPC分类号: G09G3/20 G09G3/36 G09G3/32

    摘要: A display panel comprises: a set of gate lines; and a set of data lines and a set of transmission lines extending in substantially the same direction, the set of transmission lines being electrically connected to the set of gate lines, respectively. A flat panel display apparatus comprises: a set of gate lines; a set of data lines and a set of transmission lines extending in substantially the same direction, the set of transmission lines being electrically connected to the set of gate lines, respectively; and a control circuit electrically connected to the set of data lines and the set of transmission lines.

    摘要翻译: 显示面板包括:一组栅极线; 以及一组数据线和一组沿基本上相同的方向延伸的传输线,该组传输线分别电连接到该组栅极线。 平板显示装置包括:一组栅极线; 一组数据线和一组沿基本上相同的方向延伸的传输线,该组传输线分别电连接到该组栅极线; 以及电连接到该组数据线和该组传输线的控制电路。

    Shift Register and Driving Method Thereof, Gate Driving Circuit and Display Device

    公开(公告)号:US20210225229A1

    公开(公告)日:2021-07-22

    申请号:US16303853

    申请日:2018-05-25

    IPC分类号: G09G3/20 G11C19/28

    摘要: A shift register, including: a first input circuit configured to supply a first reference signal of a first reference signal terminal to the pull-up node under control of an input signal of the input signal terminal; a pull-up node state maintaining circuit configured to supply a third reference signal of the third reference signal terminal to the pull-up node when the potential of the pull-up node is a first potential, and supply a fourth reference signal of the fourth reference signal terminal to the pull-up node when the potential of the pull-up node is a second potential; and an output circuit configured to output a first clock signal of the first clock signal terminal to the gate signal output terminal under control of the potential of the pull-up node.