Information processing system implementing program structures common to higher level program languages
    1.
    发明授权
    Information processing system implementing program structures common to higher level program languages 失效
    信息处理系统实施程序结构与高级程序语言相同

    公开(公告)号:US3665421A

    公开(公告)日:1972-05-23

    申请号:US3665421D

    申请日:1969-11-28

    Applicant: BURROUGHS CORP

    CPC classification number: G06F9/4843 G06F9/4425

    Abstract: This disclosure relates to an information processing system adapted to implement functions common to many higher level programming languages which functions require information structures to be variable in length and size. Each processor in this multiprocessing system contains various structure buffers to manage different process or program structures that are nested to provide a hierarchy of processes and subprocesses. The structure buffers include resource stack buffers that reference resources available to a currently allocated process including a description of that process environment that in turn references control information for currently executed routines. Buffers are also provided to the various process name stacks that describe parameters and operands required and also for the value stacks which hold such operands. The structure buffers are addressed through an associative memory to allow for the searching of the buffers for often used entries.

    Information processing system having means for dynamic memory address preparation
    2.
    发明授权
    Information processing system having means for dynamic memory address preparation 失效
    具有动态记忆地址准备手段的信息处理系统

    公开(公告)号:US3654621A

    公开(公告)日:1972-04-04

    申请号:US3654621D

    申请日:1969-11-28

    Applicant: BURROUGHS CORP

    CPC classification number: G06F12/04

    Abstract: This disclosure relates to an information processing system having means to dynamically prepare memory addresses for any particular element in a field of variable length which field may reside in any portion of the systems storage. Each desired element is specified by a descriptor which contains all the information necessary for such specification and the system is provided with an evaluation section which is adapted to evaluate the descriptor to extract that information necessary to create the memory control word which is employed to address the system storage. Because of the dynamic nature of the descriptor evaluation or memory address preparation, absolute memory addresses need not be created until such time as they are required. Furthermore, the method and apparatus employed allow for the accessing of a hierarchy of nested structures within the system storage.

    Abstract translation: 本公开涉及一种信息处理系统,其具有用于为可变长度的字段中的任何特定元素动态地准备存储器地址的装置,该字段可以驻留在系统存储器的任何部分中。 每个期望的元素由描述符指定,该描述符包含这种规范所需的所有信息,并且系统被提供有评估部分,该评估部分适于评估描述符以提取创建用于寻址的存储器控​​制字所必需的信息 系统存储。 由于描述符评估或存储器地址准备的动态性质,绝对内存地址不需要创建,直到需要时为止。 此外,所采用的方法和装置允许访问系统存储器内的嵌套结构的层级。

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