公开(公告)号：US3654621A

公开(公告)日：1972-04-04

申请号：US3654621D

申请日：1969-11-28

Applicant: BURROUGHS CORP

Inventor： BOCK ROBERT V ,  REHHAUSSER FREDERICK ,  EARNEST ELMER DEAN ,  GERBSTADT FREDERICK H ,  WHITE JAMES A

IPC: G06F9/34 ,  G06F12/00 ,  G06F12/04 ,  G06F9/10

CPC classification number: G06F12/04

Abstract: This disclosure relates to an information processing system having means to dynamically prepare memory addresses for any particular element in a field of variable length which field may reside in any portion of the systems storage. Each desired element is specified by a descriptor which contains all the information necessary for such specification and the system is provided with an evaluation section which is adapted to evaluate the descriptor to extract that information necessary to create the memory control word which is employed to address the system storage. Because of the dynamic nature of the descriptor evaluation or memory address preparation, absolute memory addresses need not be created until such time as they are required. Furthermore, the method and apparatus employed allow for the accessing of a hierarchy of nested structures within the system storage.

Abstract translation: 本公开涉及一种信息处理系统，其具有用于为可变长度的字段中的任何特定元素动态地准备存储器地址的装置，该字段可以驻留在系统存储器的任何部分中。 每个期望的元素由描述符指定，该描述符包含这种规范所需的所有信息，并且系统被提供有评估部分，该评估部分适于评估描述符以提取创建用于寻址的存储器控​​制字所必需的信息 系统存储。 由于描述符评估或存储器地址准备的动态性质，绝对内存地址不需要创建，直到需要时为止。 此外，所采用的方法和装置允许访问系统存储器内的嵌套结构的层级。

公开(公告)号：US3680058A

公开(公告)日：1972-07-25

申请号：US3680058D

申请日：1969-11-28

Applicant: BURROUGHS CORP

Inventor： SANTIS ALFRED J DE ,  BEERS LEROY W ,  WHITE JAMES A ,  MOYSEY JOHN A

IPC: G06F7/00 ,  G06F7/76 ,  G06F9/34 ,  G06F12/04 ,  G06F15/16

CPC classification number: G06F12/04

Abstract: This disclosure relates to an information processing system employing plural processors which system is provided with a free field storage array to accommodate operands and data segments of any size and format. Each of the respective memory storage units is, in fact, structure oriented. However, pairs of such storage units are provided with isolation units having the capability of extracting and inserting fields of information independent of the memory structure. During a fetching operation, the isolation unit is adapted to fetch two contiguous parallel words and a shifting network or barrel switch is provided to position the desired field for transfer to the requesting device. During a store operation, the shifting network or barrel switch is employed to position incoming data into the proper bit location of the memory. The selected field is determined by the starting bit and the length field information provided by the memory control word and also by the type of operation requested. Each of the requesting devices is provided with its own interface unit that contains logic to construct a memory control word for each memory module involved in a fetch or store operation. In this manner, the entire array of memory units will appear to each of the requesting devices as being free field or without structure.

Abstract translation: 本公开涉及一种采用多个处理器的信息处理系统，该系统具有自由场存储阵列以适应任何大小和格式的操作数和数据段。 实际上，各个存储器单元中的每一个实际上都是结构化的。 然而，这样的存储单元的对被提供有具有提取和插入与存储器结构无关的信息字段的能力的隔离单元。 在提取操作期间，隔离单元适于获取两个连续的并行字，并且提供移动网络或桶开关以将所需字段定位以传送到请求设备。 在存储操作期间，使用移动网络或桶形开关将输入数据定位到存储器的适当位位置。 所选择的字段由存储器控制字提供的起始位和长度字段信息以及所请求的操作类型确定。 每个请求设备被提供有其自己的接口单元，其包含逻辑以构建在获取或存储操作中涉及的每个存储器模块的存储器控​​制字。 以这种方式，整个存储器单元阵列将显示给每个请求设备，作为自由场或没有结构。