公开(公告)号：US3675209A

公开(公告)日：1972-07-04

申请号：US3675209D

申请日：1970-02-06

Applicant: BURROUGHS CORP

Inventor： TROST JOSEPH C ,  BOCK ROBERT V ,  GERBSTADT FREDERICK H ,  GRAHAM WILLIAM J ,  MILES WILSON D ,  QUESTA CHARLES R

IPC: G06F13/10 ,  G06F13/12 ,  G06F3/00

CPC classification number: G06F13/124

Abstract: A multiple channel input/output channel system for information processing systems, including one or more control modules each having a unit for translating program elements, modular data service apparatus controlled by I/O data transfer descriptors provided by the translational unit, and a memory interface unit for controlling the transfer of information between the translator and data service units and a data processing system memory. The translator unit asynchronously obtains I/O program words or elements from the processing system and combines designated portions of them to form data transfer descriptors for input/output tasks to be done. The data service apparatus interfaces with a plurality of peripheral control units which are coupled for controlling peripheral input/output devices either directly or via multiple-path peripheral exchange units.

Abstract translation: 一种用于信息处理系统的多通道输入/输出通道系统，包括一个或多个控制模块，每个控制模块均具有用于转换程序单元的单元，由转换单元提供的I / O数据传送描述符控制的模块化数据服务设备，以及存储器接口 用于控制翻译器和数据服务单元之间的信息传送的单元和数据处理系统存储器。 翻译单元从处理系统中异步获取I / O程序单词或元素，并组合它们的指定部分以形成要完成的输入/输出任务的数据传输描述符。 数据服务装置与多个外围控制单元接口，这些外围控制单元被直接地或经由多路径外围交换单元耦合用于控制外围输入/输出设备。

公开(公告)号：US3665421A

公开(公告)日：1972-05-23

申请号：US3665421D

申请日：1969-11-28

Applicant: BURROUGHS CORP

Inventor： REHHAUSSER FREDERICK V ,  EARNEST ELMER DEAN ,  BOCK ROBERT V ,  GERBSTADT FREDERICK H ,  MONEK JAMES J

IPC: G06F9/34 ,  G06F9/40 ,  G06F9/48 ,  G06F15/16

CPC classification number: G06F9/4843 ,  G06F9/4425

Abstract: This disclosure relates to an information processing system adapted to implement functions common to many higher level programming languages which functions require information structures to be variable in length and size. Each processor in this multiprocessing system contains various structure buffers to manage different process or program structures that are nested to provide a hierarchy of processes and subprocesses. The structure buffers include resource stack buffers that reference resources available to a currently allocated process including a description of that process environment that in turn references control information for currently executed routines. Buffers are also provided to the various process name stacks that describe parameters and operands required and also for the value stacks which hold such operands. The structure buffers are addressed through an associative memory to allow for the searching of the buffers for often used entries.

公开(公告)号：US3654621A

公开(公告)日：1972-04-04

申请号：US3654621D

申请日：1969-11-28

Applicant: BURROUGHS CORP

Inventor： BOCK ROBERT V ,  REHHAUSSER FREDERICK ,  EARNEST ELMER DEAN ,  GERBSTADT FREDERICK H ,  WHITE JAMES A

IPC: G06F9/34 ,  G06F12/00 ,  G06F12/04 ,  G06F9/10

CPC classification number: G06F12/04

Abstract: This disclosure relates to an information processing system having means to dynamically prepare memory addresses for any particular element in a field of variable length which field may reside in any portion of the systems storage. Each desired element is specified by a descriptor which contains all the information necessary for such specification and the system is provided with an evaluation section which is adapted to evaluate the descriptor to extract that information necessary to create the memory control word which is employed to address the system storage. Because of the dynamic nature of the descriptor evaluation or memory address preparation, absolute memory addresses need not be created until such time as they are required. Furthermore, the method and apparatus employed allow for the accessing of a hierarchy of nested structures within the system storage.

Abstract translation: 本公开涉及一种信息处理系统，其具有用于为可变长度的字段中的任何特定元素动态地准备存储器地址的装置，该字段可以驻留在系统存储器的任何部分中。 每个期望的元素由描述符指定，该描述符包含这种规范所需的所有信息，并且系统被提供有评估部分，该评估部分适于评估描述符以提取创建用于寻址的存储器控​​制字所必需的信息 系统存储。 由于描述符评估或存储器地址准备的动态性质，绝对内存地址不需要创建，直到需要时为止。 此外，所采用的方法和装置允许访问系统存储器内的嵌套结构的层级。