公开(公告)号：US20080117344A1

公开(公告)日：2008-05-22

申请号：US11838385

申请日：2007-08-14

申请人： Beom Jun KIM ,  Sang Youn HAN ,  Byeong Jae AHN ,  Sang Yong NO ,  Shin Tack KANG ,  Hyeong Jun PARK

发明人： Beom Jun KIM ,  Sang Youn HAN ,  Byeong Jae AHN ,  Sang Yong NO ,  Shin Tack KANG ,  Hyeong Jun PARK

IPC分类号： G02F1/1343 ,  H01L21/84 ,  H01L29/06

CPC分类号： G02F1/136259 ,  G02F1/136227 ,  H01L27/124 ,  H01L27/1248

摘要： A liquid crystal display panel includes a first substrate, a second substrate facing the first substrate, and a liquid crystal layer interposed therebetween. The second substrate includes gate lines, data lines crossing the gate lines to define sub-pixel regions, a thin film transistor connected to a gate line and a data line, an organic passivation layer, a pixel electrode connected to the thin film transistor, a repair portion where the pixel electrode overlaps with a previous gate line, and a repair hole formed in the repair portion to penetrate the organic passivation layer. The pixel electrode is arranged in the repair hole. A method for repairing a defective pixel includes connecting a gate extending portion of the previous gate line to the pixel electrode in the repair portion using a laser, and cutting the defective pixel's drain electrode connected to the pixel electrode.

摘要翻译： 液晶显示面板包括第一基板，面向第一基板的第二基板和插入其间的液晶层。 第二基板包括栅极线，与栅极线交叉以限定子像素区域的数据线，连接到栅极线和数据线的薄膜晶体管，有机钝化层，连接到薄膜晶体管的像素电极， 修复部分，其中像素电极与先前的栅极线重叠，以及修复孔，形成在修复部分中以穿透有机钝化层。 像素电极布置在修复孔中。 用于修复缺陷像素的方法包括使用激光将先前栅极线的栅极延伸部分连接到修复部分中的像素电极，以及切割连接到像素电极的缺陷像素的漏电极。

公开(公告)号：US20070171115A1

公开(公告)日：2007-07-26

申请号：US11620393

申请日：2007-01-05

申请人： Beom Jun KIM ,  Shin Tack KANG ,  Byeong Jae AHN ,  Jong Hyuk LEE ,  Yu Jin KIM

发明人： Beom Jun KIM ,  Shin Tack KANG ,  Byeong Jae AHN ,  Jong Hyuk LEE ,  Yu Jin KIM

IPC分类号： H03M1/12

CPC分类号： G09G3/3677

摘要： A gate driver for a liquid crystal display includes a shift register including a plurality of stages for outputting gate drive signals. Each of the stages includes a pull-up circuit for providing the gate drive signal to an output terminal in response to first and second clock signals, a pull-down circuit for providing a gate off signal to the output terminal, a pull-up driving circuit for driving the pull-up circuit in response to a first control signal, and a pull-down driving circuit for driving the pull-down circuit in response to a second control signal. Each of the stages includes a plurality of switching devices. A node of nodes where a signal line, through which the first clock signal, the second clock signal, the first control signal or the second control signal is applied, is electrically connected to a switching device includes at least two contacts.

摘要翻译： 用于液晶显示器的栅极驱动器包括：移位寄存器，包括用于输出栅极驱动信号的多个级。 每个级包括用于响应于第一和第二时钟信号将栅极驱动信号提供给输出端的上拉电路，用于向输出端提供栅极截止信号的下拉电路，上拉驱动 用于响应于第一控制信号驱动上拉电路的电路，以及用于响应于第二控制信号驱动下拉电路的下拉驱动电路。 每个级包括多个开关装置。 通过其施加第一时钟信号，第二时钟信号，第一控制信号或第二控制信号的信号线，电连接到开关装置的节点的节点包括至少两个触点。

公开(公告)号：US20130113772A1

公开(公告)日：2013-05-09

申请号：US13429871

申请日：2012-03-26

申请人： Shin Tack KANG ,  Kyung-Hee KIM ,  Beom Jun KIM ,  Sung Man KIM ,  Jong Hwan LEE ,  Hong Woo LEE ,  Hye Rhee HAN ,  Ji Hye HEO

发明人： Shin Tack KANG ,  Kyung-Hee KIM ,  Beom Jun KIM ,  Sung Man KIM ,  Jong Hwan LEE ,  Hong Woo LEE ,  Hye Rhee HAN ,  Ji Hye HEO

IPC分类号： G09G5/00

CPC分类号： G09G3/3674 ,  G09G3/20 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/0291 ,  G09G2320/045

摘要： A display panel includes a gate driver connected to a gate line, where the gate driver includes a plurality of stages, where each of the stages includes at least one dual gate thin film transistor having a first control terminal and a second control terminal, and where each of the stages receives a clock signal, a first low voltage, a second low voltage, at least one transmission signal of previous stages, at least two transmission signals of subsequent stages and an output control signal from one of the stages to output a gate voltage including a gate-on voltage and a gate-off voltage.

摘要翻译： 显示面板包括连接到栅极线的栅极驱动器，其中栅极驱动器包括多个级，其中每个级包括至少一个双栅极薄膜晶体管，其具有第一控制端子和第二控制端子，并且其中 每个级接收时钟信号，第一低电压，第二低电压，先前级的至少一个传输信号，后续级的至少两个传输信号和来自一个级的输出控制信号以输出门 电压包括栅极导通电压和栅极截止电压。

公开(公告)号：US20080036725A1

公开(公告)日：2008-02-14

申请号：US11782957

申请日：2007-07-25

申请人： Hong-Woo LEE ,  Myung-Koo HUR ,  Jong-Hwan LEE ,  Beom Jun KIM ,  Sung-Man KIM

发明人： Hong-Woo LEE ,  Myung-Koo HUR ,  Jong-Hwan LEE ,  Beom Jun KIM ,  Sung-Man KIM

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2320/02 ,  G09G2330/08 ,  G11C19/28

摘要： A gate driver comprises a shift register that has a plurality of stages connected together and outputs a gate signal comprising a first pulse and a second pulse to a gate line. A stage includes a holding part, a pre-charging part, a pull-up part, and a pull-down part. The holding part discharges an output terminal to an off-voltage in response to a first clock signal. The pre-charging part turns off the holding part and outputs the first clock signal as the first pulse to the output terminal in response to an output signal of a previous stage. The pull-up part outputs a second clock signal as the second pulse to the output terminal in response to the output signal of the previous stage. The pull-down part discharges the first output terminal to the off-voltage in response to an output signal of a next stage.

摘要翻译： 栅极驱动器包括具有连接在一起的多个级的移位寄存器，并将包括第一脉冲和第二脉冲的门信号输出到栅极线。 舞台包括保持部分，预充电部分，上拉部分和下拉部分。 保持部分响应于第一时钟信号将输出端子放电到截止电压。 预充电部件关闭保持部件，并且响应于前一级的输出信号将第一时钟信号作为第一脉冲输出到输出端子。 上拉部分响应于前一级的输出信号，将第二时钟信号作为第二脉冲输出到输出端。 下拉部分响应于下一级的输出信号将第一输出端子放电到截止电压。

公开(公告)号：US20220371793A1

公开(公告)日：2022-11-24

申请号：US17326398

申请日：2021-05-21

申请人： Beom Jun KIM

发明人： Beom Jun KIM

IPC分类号： B65D51/18 ,  B65D43/02 ,  B65D43/16

摘要： The present invention relates to an airtight container that is usually used to keep foodstuffs including food and drinks. The airtight container includes: a container part; and a lid part configured to be locked to the top of the container part, in which the lid part has a two-step opening/closing structure to partially open the container part or to completely open the container by being separated from the container part when the lid part is locked to the container part. The lid part includes: a body having locking portions integrally formed such that the body can be locked to the container part on the top of the container part; and a lid plate hinged at a side on the body part to be rotatable, having integral locking portions to be able to be locked to the container part, and used to open a portion of the container part with the body locked to the container part.
According to the present invention, it is possible to open/close the lid part fastened to the container part in two steps of partial opening/closing and complete opening/closing, increase ease and convenience in use, achieve stable sealing force at the container part and the lid part, and increase durability of the product such as preventing contraction when forming the product.

公开(公告)号：US20130106677A1

公开(公告)日：2013-05-02

申请号：US13442583

申请日：2012-04-09

申请人： Bon-Yong KOO ,  Beom Jun KIM ,  Ho Kyoon KWON

发明人： Bon-Yong KOO ,  Beom Jun KIM ,  Ho Kyoon KWON

IPC分类号： G09G3/36

CPC分类号： G09G3/36 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2320/0209 ,  G11C19/28

摘要： The present invention divides a wire supplying a scan start signal to a gate driver into two wires, so as to avoid overlapping a clock signal line. In this way the clock signal is not delayed by interference, and a gate driving margin may continue uninterrupted, thereby uniformly outputting a gate-on voltage. In particular, if the clock signal line is connected to all stages in the gate driver and the clock signal line overlaps the scan start signal line, unsightly horizontal bands appear on the image and the parallel gate lines generate a very large parasitic capacitance. In contrast, the gate drivers in the present disclosure comprise clock signal lines which do not overlap the scan start signal lines. As benefits, interference resulting in horizontal banding is minimized and the power consumption may be reduced by about 10%.

摘要翻译： 本发明将将扫描开始信号提供给栅极驱动器的线分成两条线，以避免与时钟信号线重叠。 以这种方式，时钟信号不被干扰延迟，并且栅极驱动裕度可以不间断地继续，从而均匀地输出栅极导通电压。 特别地，如果时钟信号线连接到栅极驱动器中的所有级并且时钟信号线与扫描起始信号线重叠，则在图像上出现不好看的水平频带，并行栅极线产生非常大的寄生电容。 相反，本公开的栅极驱动器包括不与扫描起始信号线重叠的时钟信号线。 作为益处，导致水平条带的干扰被最小化，并且功耗可以降低大约10％。