公开(公告)号：US08304772B2

公开(公告)日：2012-11-06

申请号：US12620102

申请日：2009-11-17

申请人： Yeo-Geon Yoon ,  Myung-Koo Hur ,  Sang-Gun Choi ,  Joo-Han Kim ,  Cheol-Gon Lee ,  Jung-Suk Bang

发明人： Yeo-Geon Yoon ,  Myung-Koo Hur ,  Sang-Gun Choi ,  Joo-Han Kim ,  Cheol-Gon Lee ,  Jung-Suk Bang

IPC分类号： H01L29/04

CPC分类号： H01L29/41733 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/78636

摘要： A thin-film transistor array panel and a manufacturing method thereof are provided for one or more embodiments. The thin-film transistor array panel may include: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; a source electrode and a drain electrode formed on the gate insulating layer; and a flatness layer formed on the source electrode and the drain electrode, wherein the drain electrode has a higher height than the flatness layer.

摘要翻译： 为一个或多个实施例提供薄膜晶体管阵列面板及其制造方法。 薄膜晶体管阵列面板可以包括：基板; 形成在所述基板上的栅电极; 形成在所述栅电极上的栅极绝缘层; 形成在所述栅极绝缘层上的源电极和漏电极; 以及形成在源电极和漏电极上的平坦层，其中漏电极具有比平坦层高的高度。

公开(公告)号：US08259274B2

公开(公告)日：2012-09-04

申请号：US12464420

申请日：2009-05-12

申请人： Sung-Man Kim ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Yong Woo Lee ,  Hong-Woo Lee ,  Jin-Suk Seo

发明人： Sung-Man Kim ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Yong Woo Lee ,  Hong-Woo Lee ,  Jin-Suk Seo

IPC分类号： G02F1/1337 ,  G02F1/1343

CPC分类号： G02F1/133707

摘要： Disclosed is a liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer interposed there between. The first substrate is provided with gate lines and data lines thereon. The gate lines and data lines cross with each other and are insulated from each other. Pixel electrodes are stacked on the gate lines and data lines. Each pixel electrode includes first and second sub-pixel electrodes spaced apart from each other and a connection electrode, which connects the first sub-pixel electrode to the second sub-pixel electrode. The second substrate is provided with a common electrode thereon. The common electrode includes a first domain divider formed on the center of the first sub-pixel electrode and a second domain divider formed on the center of the second sub-pixel electrode.

摘要翻译： 公开了一种液晶显示装置，包括第一基板，第二基板和介于其间的液晶层。 第一基板上设置有栅线和数据线。 栅极线和数据线彼此交叉并且彼此绝缘。 像素电极堆叠在栅极线和数据线上。 每个像素电极包括彼此间隔开的第一和第二子像素电极和将第一子像素电极连接到第二子像素电极的连接电极。 第二基板上设置有公共电极。 公共电极包括形成在第一子像素电极的中心上的第一域分隔器和形成在第二子像素电极的中心的第二域分隔器。

公开(公告)号：US08068077B2

公开(公告)日：2011-11-29

申请号：US12407626

申请日：2009-03-19

申请人： Myung-Jae Park ,  Hyang-Shik Kong ,  Myung-Koo Hur ,  Jong-Woong Chang ,  Seong-Young Lee ,  Dong-Gyu Kim

发明人： Myung-Jae Park ,  Hyang-Shik Kong ,  Myung-Koo Hur ,  Jong-Woong Chang ,  Seong-Young Lee ,  Dong-Gyu Kim

IPC分类号： G09G3/36

CPC分类号： G02F1/13458 ,  G02F1/1345

摘要： A thin film transistor array panel is provided, which includes: a display cell array circuit including a plurality of gate lines, a plurality of data lines, a plurality of thin film transistors, and a plurality of pixel electrodes; a gate driving circuit supplying gate signals to the gate lines; and a signal line connected to the gate driving circuit and including first and second line segments separated from each other and a connection member connected to the first and second line segments through at least a contact hole exposing at least one of the first and the second line segments.

摘要翻译： 提供薄膜晶体管阵列面板，其包括：显示单元阵列电路，包括多个栅极线，多条数据线，多个薄膜晶体管和多个像素电极; 栅极驱动电路，向栅极线提供栅极信号; 以及连接到栅极驱动电路并且包括彼此分离的第一和第二线段的信号线以及通过至少暴露第一和第二线中的至少一个的接触孔连接到第一和第二线段的连接构件 细分。

公开(公告)号：US07932965B2

公开(公告)日：2011-04-26

申请号：US12909757

申请日：2010-10-21

申请人： Myung-Koo Hur

发明人： Myung-Koo Hur

IPC分类号： G02F1/136 ,  G02F1/1343 ,  H01L21/00

CPC分类号： H01L27/1248 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1288

摘要： A thin film transistor array panel includes a substrate, a data line and a gate electrode formed on the substrate, a insulating layer formed on the data line and the gate electrode, a semiconductor layer formed on the insulating layer, a drain electrode and a source electrode formed on the semiconductor layer, a passivation layer formed on the drain electrode and the source electrode including a first contact hole to expose a portion of the data line, a second contact hole to expose a portion of the source electrode, a third contact hole to expose a portion of the drain electrode, and a fourth contact hole to expose a portion of gate electrode, a first connector formed on the passivation layer and connected to the data line and the source electrode through the first contact hole and the second contact hole, a gate line formed on the passivation layer and connected to the gate electrode through the fourth contact hole, and a pixel electrode connected to the drain electrode through the third contact hole.

摘要翻译： 薄膜晶体管阵列面板包括基板，数据线和形成在基板上的栅电极，形成在数据线和栅电极上的绝缘层，形成在绝缘层上的半导体层，漏电极和源极 电极，形成在所述半导体层上，钝化层，形成在所述漏电极和所述源电极上，所述钝化层包括第一接触孔以暴露所述数据线的一部分;第二接触孔，用于暴露所述源电极的一部分;第三接触孔 露出一部分漏电极和第四接触孔，以露出栅电极的一部分;形成在钝化层上并通过第一接触孔和第二接触孔连接到数据线和源电极的第一连接器 形成在钝化层上并通过第四接触孔连接到栅电极的栅极线和通过t连接到漏电极的像素电极 连接孔。

公开(公告)号：US07932887B2

公开(公告)日：2011-04-26

申请号：US11761149

申请日：2007-06-11

申请人： Sung-Man Kim ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Hong-Woo Lee

发明人： Sung-Man Kim ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Hong-Woo Lee

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G2300/0408 ,  G11C19/28

摘要： A gate driving circuit includes stages connected in series. In a stage, a pull-up part pulls up a present gate signal to a level of a first clock signal, and a pull-down part receives a next gate signal from a next stage to discharge the present gate signal to an off-voltage. A pull-up driving part turns on or turns off the pull-up part and the carry part. A holding part holds the present gate signal at the off-voltage and a present inverter turns on or turns off the holding part in response to the first clock signal. A ripple preventing capacitor is connected between a present node and an output terminal of a previous stage's inverter to prevent a ripple at the present Q-node in response to an output signal from the previous inverter.

摘要翻译： 栅极驱动电路包括串联连接的级。 在一个阶段中，上拉部分将当前栅极信号提升到第一时钟信号的电平，并且下拉部分从下一级接收下一个栅极信号，以将当前栅极信号放电到截止电压 。 上拉驱动部分打开或关闭上拉部分和进位部分。 保持部分将当前门信号保持在截止电压，并且本逆变器响应于第一时钟信号而导通或关断保持部分。 防波电容器连接在前级逆变器的当前节点和输出端之间，以防止来自前一个逆变器的输出信号在当前Q节点处产生纹波。

公开(公告)号：US07855757B2

公开(公告)日：2010-12-21

申请号：US11828460

申请日：2007-07-26

申请人： Jong-Hyuk Lee ,  Beom-Jun Kim ,  Sung-Man Kim ,  Bong-Jun Lee ,  Shin-Tack Kang ,  Hyeong-Jun Park ,  Yu-Jin Kim ,  Jong-Hwan Lee ,  Myung-Koo Hur ,  Jong-Oh Kim ,  Hong-Woo Lee

发明人： Jong-Hyuk Lee ,  Beom-Jun Kim ,  Sung-Man Kim ,  Bong-Jun Lee ,  Shin-Tack Kang ,  Hyeong-Jun Park ,  Yu-Jin Kim ,  Jong-Hwan Lee ,  Myung-Koo Hur ,  Jong-Oh Kim ,  Hong-Woo Lee

IPC分类号： G02F1/1343

CPC分类号： G02F1/136213 ,  G02F1/136259 ,  G02F2001/136272 ,  G02F2201/508

摘要： The present invention provides a liquid crystal display (“LCD”), a method of manufacturing the same, and a method of repairing the same capable of obtaining a wide viewing angle and improving a success ratio of repair. The LCD includes a gate line, a first data line intersecting the gate line, a thin film transistor (“TFT”) connected with the gate line and the first data line, a pixel electrode connected with the TFT, a first conductive pattern partially overlapping with a first end of the pixel electrode, a second conductive pattern partially overlapping with a second end of the pixel electrode, and a storage capacitor, wherein at least one of the first conductive pattern and the second conductive pattern partially overlaps with the first data line adjacent to the first end of the pixel electrode and a second data line adjacent to the second end of the pixel electrode, respectively.

摘要翻译： 本发明提供一种液晶显示器（“LCD”）及其制造方法，以及能够获得宽视角并提高维修成功率的修复方法。 LCD包括栅极线，与栅极线相交的第一数据线，与栅极线和第一数据线连接的薄膜晶体管（“TFT”），与TFT连接的像素电极，部分重叠的第一导电图案 具有像素电极的第一端，与像素电极的第二端部分重叠的第二导电图案和存储电容器，其中第一导电图案和第二导电图案中的至少一个部分地与第一数据线重叠 与像素电极的第一端相邻，并且分别与像素电极的第二端相邻的第二数据线。

公开(公告)号：US07846784B2

公开(公告)日：2010-12-07

申请号：US11346717

申请日：2006-02-03

申请人： Beom-Jun Kim ,  Sun-Ok Song ,  Myung-Koo Hur

发明人： Beom-Jun Kim ,  Sun-Ok Song ,  Myung-Koo Hur

IPC分类号： H01L21/00

CPC分类号： H01L29/41733 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/458

摘要： A method of manufacturing a thin film transistor array panel includes forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate line, forming a semiconductor layer on the gate insulating layer, forming an ohmic contact layer on the semiconductor layer, and forming a data line including a source electrode and a drain electrode on the ohmic contact layer. The method further includes depositing a conductive film on the data line and the drain electrode, forming a first photoresist on the conductive film, etching the conductive film using the first photoresist as a mask to form a pixel electrode at least connected to the drain electrode, depositing a passivation layer, and removing the first photoresist to form a passivation member.

摘要翻译： 一种制造薄膜晶体管阵列面板的方法包括：在衬底上形成包括栅电极的栅极线，在栅极线上形成栅极绝缘层，在栅极绝缘层上形成半导体层，在该栅极绝缘层上形成欧姆接触层 半导体层，并且在欧姆接触层上形成包括源电极和漏电极的数据线。 该方法还包括在数据线和漏电极上沉积导电膜，在导电膜上形成第一光致抗蚀剂，使用第一光致抗蚀剂作为掩模蚀刻导电膜，以形成至少连接到漏电极的像素电极， 沉积钝化层，并除去第一光致抗蚀剂以形成钝化部件。

公开(公告)号：US20100171123A1

公开(公告)日：2010-07-08

申请号：US12348790

申请日：2009-01-05

申请人： Myung-Koo HUR

发明人： Myung-Koo HUR

IPC分类号： H01L33/00 ,  H01L21/30

CPC分类号： H01L29/78696 ,  H01L27/1248 ,  H01L29/66765

摘要： A display apparatus includes a gate electrode, a first insulating layer pattern formed over the gate electrode, a second insulating layer pattern formed over the first insulating layer pattern, exposing a portion of the first insulating layer, a semiconductor film pattern formed over the second insulating layer pattern and over the first insulating layer pattern, an impurity-doped semiconductor film pattern formed on the semiconductor film pattern, wherein the impurity-doped semiconductor film pattern contacts the top surface of the semiconductor film pattern and exposes a portion of the semiconductor film pattern formed over the gate electrode, a source electrode and a drain electrode each formed over a portion of the impurity doped semiconductor film pattern, a protection film pattern formed over the source electrode and the drain electrode in a TFT area, the protection film pattern having a contact hole over the drain electrode, a pixel electrode pattern formed on the protection film pattern and_electrically connected to the drain electrode.

摘要翻译： 一种显示装置，包括栅电极，形成在栅电极上的第一绝缘层图案，形成在第一绝缘层图案上的第二绝缘层图案，暴露第一绝缘层的一部分，形成在第二绝缘层上的半导体膜图案 并且在所述第一绝缘层图案之上，形成在所述半导体膜图案上的杂质掺杂半导体膜图案，其中所述杂质掺杂半导体膜图案接触所述半导体膜图案的顶表面并且暴露所述半导体膜图案的一部分 形成在所述栅电极上，源电极和漏电极，各自形成在所述杂质掺杂半导体膜图案的一部分上，在TFT区域中形成在所述源电极和所述漏极上的保护膜图案，所述保护膜图案具有 漏极上的接触孔，形成在保护膜上的像素电极图案 m图案并且电连接到漏电极。

公开(公告)号：US07564527B2

公开(公告)日：2009-07-21

申请号：US11839752

申请日：2007-08-16

申请人： Sung-Man Kim ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Yong Woo Lee ,  Hong-Woo Lee ,  Jin-Suk Seo

发明人： Sung-Man Kim ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Yong Woo Lee ,  Hong-Woo Lee ,  Jin-Suk Seo

IPC分类号： G02F1/1337

CPC分类号： G02F1/133707

摘要： Disclosed is a liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer interposed there between. The first substrate is provided with gate lines and data lines thereon. The gate lines and data lines cross with each other and are insulated from each other. Pixel electrodes are stacked on the gate lines and data lines. Each pixel electrode includes first and second sub-pixel electrodes spaced apart from each other and a connection electrode, which connects the first sub-pixel electrode to the second sub-pixel electrode. The second substrate is provided with a common electrode thereon. The common electrode includes a first domain divider formed on the center of the first sub-pixel electrode and a second domain divider formed on the center of the second sub-pixel electrode.

摘要翻译： 公开了一种液晶显示装置，包括第一基板，第二基板和介于其间的液晶层。 第一基板上设置有栅线和数据线。 栅极线和数据线彼此交叉并且彼此绝缘。 像素电极堆叠在栅极线和数据线上。 每个像素电极包括彼此间隔开的第一和第二子像素电极和将第一子像素电极连接到第二子像素电极的连接电极。 第二基板上设置有公共电极。 公共电极包括形成在第一子像素电极的中心上的第一域分隔器和形成在第二子像素电极的中心的第二域分隔器。

公开(公告)号：US07362402B2

公开(公告)日：2008-04-22

申请号：US11625435

申请日：2007-01-22

申请人： Myung-Koo Hur ,  Chang-Oh Jeong

发明人： Myung-Koo Hur ,  Chang-Oh Jeong

IPC分类号： G02F1/1343 ,  G02F1/136

CPC分类号： G02F1/136286 ,  G02F2001/13629 ,  G02F2001/136295

摘要： A wire for a liquid crystal display has a dual-layered structure comprising a first layer made of molybdenum or molybdenum alloy, and a second layer made of molybdenum nitride or molybdenum alloy nitride. To manufacture the wire, a layer made of either a molybdenum or a molybdenum alloy, and another layer one of either a molybdenum nitride or molybdenum alloy nitride by using reactive sputtering method are deposited in sequence, and then patterned simultaneously. The target for reactive sputtering is made of either molybdenum or molybdenum alloy, and the molybdenum alloy comprises one selected from the group consisting of tungsten, chromium, zirconium, and nickel of the content ratio of 0.1 to less than 20 atm % of. The reactive gas mixture for reactive sputtering includes an argon gas and inflow amount of the nitrogen gas is at least 50% of argon gas, to minimize the etch rate of the molybdenum nitride layer or the molybdenum alloy nitride layer for ITO etchant.

摘要翻译： 用于液晶显示器的线具有包括由钼或钼合金制成的第一层和由氮化钼或钼合金氮化物制成的第二层的双层结构。 为了制造导线，依次沉积由钼或钼合金制成的层，以及通过使用反应溅射法的氮化钼或钼合金氮化物中的另一层，然后同时进行图案化。 反应溅射的目的是由钼或钼合金制成，钼合金包含选自钨，铬，锆和镍中的一种，其含量比例为0.1至小于20atm％。 用于反应溅射的反应性气体混合物包括氩气，并且氮气的流入量为氩气的至少50％，以最小化用于ITO蚀刻剂的氮化钼层或钼合金氮化物层的蚀刻速率。