Semiconductor device having freestanding semiconductor layer
    1.
    发明授权
    Semiconductor device having freestanding semiconductor layer 有权
    具有独立半导体层的半导体器件

    公开(公告)号:US07709892B2

    公开(公告)日:2010-05-04

    申请号:US11426698

    申请日:2006-06-27

    IPC分类号: H01L29/94 H01L27/88

    摘要: A method of providing a freestanding semiconductor layer on a conventional SOI or bulk-substrate silicon device includes forming an amorphous or polycrystalline mandrel on a monocrystalline base structure. A conformal polycrystalline semiconductor layer is then formed on the mandrel and on the base structure, wherein the polycrystalline layer contacts the base structure. The polycrystalline semiconductor layer is then recrystallized so that it has a crystallinity substantially similar to that of the base structure. Thus, a freestanding semiconductor layer is formed with a high degree of control of the thickness and height thereof and maintaining a uniformity of thickness.

    摘要翻译: 在传统的SOI或体衬底硅器件上提供独立半导体层的方法包括在单晶基底结构上形成非晶或多晶心轴。 然后在心轴和基底结构上形成共形多晶半导体层,其中多晶层接触基底结构。 然后将多晶半导体层重结晶,使其具有与基础结构基本相似的结晶度。 因此,以高度控制其厚度和高度的方式形成独立的半导体层并保持厚度的均匀性。

    Method of forming freestanding semiconductor layer
    2.
    发明授权
    Method of forming freestanding semiconductor layer 失效
    形成独立半导体层的方法

    公开(公告)号:US07087506B2

    公开(公告)日:2006-08-08

    申请号:US10604116

    申请日:2003-06-26

    IPC分类号: H01L21/324

    摘要: A method of providing a freestanding semiconductor layer on a conventional SOI or bulk-substrate silicon device includes forming an amorphous or polycrystalline mandrel on a monocrystalline base structure. A conformal polycrystalline semiconductor layer is then formed on the mandrel and on the base structure, wherein the polycrystalline layer contacts the base structure. The polycrystalline semiconductor layer is then recrystallized so that it has a crystallinity substantially similar to that of the base structure. Thus, a freestanding semiconductor layer is formed with a high degree of control of the thickness and height thereof and maintaining a uniformity of thickness.

    摘要翻译: 在传统的SOI或体衬底硅器件上提供独立半导体层的方法包括在单晶基底结构上形成非晶或多晶心轴。 然后在心轴和基底结构上形成共形多晶半导体层,其中多晶层接触基底结构。 然后将多晶半导体层重结晶,使其具有与基础结构基本相似的结晶度。 因此,以高度控制其厚度和高度的方式形成独立的半导体层并保持厚度的均匀性。

    Virtual body-contacted trigate
    3.
    发明授权
    Virtual body-contacted trigate 失效
    虚拟身体接触的三位一体

    公开(公告)号:US07700446B2

    公开(公告)日:2010-04-20

    申请号:US11830868

    申请日:2007-07-31

    IPC分类号: H01L21/336

    摘要: A field effect transistor (FET) and method of forming the FET comprises a substrate; a silicon germanium (SiGe) layer over the substrate; a semiconductor layer over and adjacent to the SiGe layer; an insulating layer adjacent to the substrate, the SiGe layer, and the semiconductor layer; a pair of first gate structures adjacent to the insulating layer; and a second gate structure over the insulating layer. Preferably, the insulating layer is adjacent to a side surface of the SiGe layer and an upper surface of the semiconductor layer, a lower surface of the semiconductor layer, and a side surface of the semiconductor layer. Preferably, the SiGe layer comprises carbon. Preferably, the pair of first gate structures are substantially transverse to the second gate structure. Additionally, the pair of first gate structures are preferably encapsulated by the insulating layer.

    摘要翻译: 场效应晶体管(FET)和形成FET的方法包括:衬底; 衬底上的硅锗(SiGe)层; 在SiGe层上并邻近SiGe层的半导体层; 与衬底相邻的绝缘层,SiGe层和半导体层; 邻近绝缘层的一对第一栅极结构; 以及绝缘层上的第二栅极结构。 优选地,绝缘层与SiGe层的侧表面,半导体层的上表面,半导体层的下表面和半导体层的侧表面相邻。 优选地,SiGe层包含碳。 优选地,该对第一栅极结构基本上横向于第二栅极结构。 此外,该对第一栅极结构优选地被绝缘层封装。

    Virtual body-contacted trigate
    4.
    发明授权
    Virtual body-contacted trigate 有权
    虚拟身体接触的三位一体

    公开(公告)号:US07288802B2

    公开(公告)日:2007-10-30

    申请号:US11161213

    申请日:2005-07-27

    IPC分类号: H01L31/00

    摘要: A field effect transistor (FET) and method of forming the FET comprises a substrate; a silicon germanium (SiGe) layer over the substrate; a semiconductor layer over and adjacent to the SiGe layer; an insulating layer adjacent to the substrate, the SiGe layer, and the semiconductor layer; a pair of first gate structures adjacent to the insulating layer; and a second gate structure over the insulating layer. Preferably, the insulating layer is adjacent to a side surface of the SiGe layer and an upper surface of the semiconductor layer, a lower surface of the semiconductor layer, and a side surface of the semiconductor layer. Preferably, the SiGe layer comprises carbon. Preferably, the pair of first gate structures are substantially transverse to the second gate structure. Additionally, the pair of first gate structures are preferably encapsulated by the insulating layer.

    摘要翻译: 场效应晶体管(FET)和形成FET的方法包括:衬底; 衬底上的硅锗(SiGe)层; 在SiGe层上并邻近SiGe层的半导体层; 与衬底相邻的绝缘层,SiGe层和半导体层; 邻近绝缘层的一对第一栅极结构; 以及绝缘层上的第二栅极结构。 优选地,绝缘层与SiGe层的侧表面,半导体层的上表面,半导体层的下表面和半导体层的侧表面相邻。 优选地,SiGe层包含碳。 优选地,该对第一栅极结构基本上横向于第二栅极结构。 此外,该对第一栅极结构优选地被绝缘层封装。

    finFET TRANSISTOR AND CIRCUIT
    5.
    发明申请
    finFET TRANSISTOR AND CIRCUIT 有权
    finFET晶体管和电路

    公开(公告)号:US20100203689A1

    公开(公告)日:2010-08-12

    申请号:US12762427

    申请日:2010-04-19

    IPC分类号: H01L21/336

    摘要: A drive strength tunable FinFET, a method of drive strength tuning a FinFET, a drive strength ratio tuned FinFET circuit and a method of drive strength tuning a FinFET, wherein the FinFET has either at least one perpendicular and at least one angled fin or has at least one double-gated fin and one split-gated fin.

    摘要翻译: 驱动强度可调谐FinFET,FinFET的驱动强度调谐方法,驱动强度比调谐FinFET电路和FinFET的驱动强度调谐方法,其中FinFET具有至少一个垂直和至少一个成角度的鳍或具有 最少一个双门翅和一个分闸门。

    Multi-height FinFETS
    6.
    发明授权
    Multi-height FinFETS 有权
    多高度FinFETS

    公开(公告)号:US06909147B2

    公开(公告)日:2005-06-21

    申请号:US10249738

    申请日:2003-05-05

    摘要: The present invention provides a FinFET device that has a first fin and a second fin. Each fin has a channel region and source and drain regions that extend from the channel region. The fins have different heights. The invention has a gate conductor positioned adjacent the fins. The gate conductor runs perpendicular to the fins and crosses the channel region of each of the first fin and second fin. The fins are parallel to one another. The ratio of the height of the first fin to the height of the second fin comprises a ratio of one to 2/3. The ratio is used to tune the performance of the transistor and determines the total channel width of the transistor.

    摘要翻译: 本发明提供一种具有第一鳍片和第二鳍片的FinFET器件。 每个散热片具有从沟道区延伸的沟道区和源极和漏极区。 翅片具有不同的高度。 本发明具有邻近散热片定位的栅极导体。 栅极导体垂直于翅片延伸并与第一鳍片和第二鳍片中的每一个的沟道区域交叉。 翅片彼此平行。 第一翅片的高度与第二翅片的高度的比率为1/2/3的比例。 该比率用于调整晶体管的性能并确定晶体管的总通道宽度。

    High mobility crystalline planes in double-gate CMOS technology
    7.
    发明授权
    High mobility crystalline planes in double-gate CMOS technology 有权
    双栅极CMOS技术中的高迁移率晶面

    公开(公告)号:US06794718B2

    公开(公告)日:2004-09-21

    申请号:US10248123

    申请日:2002-12-19

    IPC分类号: H01L2712

    摘要: A MOS device with first and second freestanding semiconductor bodies formed on a substrate. The first freestanding semiconductor body has a first portion thereof disposed at a non-orientation orthogonal, non parallel orientation with respect to a first portion of the second freestanding semiconductor body. These portions of said first and second freestanding semiconductor bodies have respective first and second crystalline orientations. A first gate electrode crosses over at least part of said first portion of said first freestanding semiconductor body at a non-orthogonal angle, as does a second gate electrode over the first portion of the second freestanding semiconductor body.

    摘要翻译: 具有形成在基板上的第一和第二独立半导体本体的MOS器件。 第一独立半导体本体具有相对于第二独立半导体本体的第一部分以非正交的非平行取向设置的第一部分。 所述第一和第二独立半导体本体的这些部分具有相应的第一和第二晶体取向。 第一栅电极与第二独立半导体本体的第一部分上的第二栅电极非正交角度交叉​​在所述第一独立半导体本体的所述第一部分的至少一部分上。

    Method of making a finFET having suppressed parasitic device characteristics
    8.
    发明授权
    Method of making a finFET having suppressed parasitic device characteristics 有权
    制造具有抑制寄生器件特性的finFET的方法

    公开(公告)号:US07470578B2

    公开(公告)日:2008-12-30

    申请号:US11267882

    申请日:2005-11-04

    摘要: A finFET (100) having sidwall spacers (136, 140) to suppress parasitic devices in the upper region of a channel and at the bases of source(s) and drain(s) that are artifacts of the fabrication techniques used to make the finFET. The FinFET is formed on an SOI wafer (104) by etching through a hardmask (148) so as to form a freestanding fin (120). Prior to doping the source(s) (124) and drain(s) (128), a layer (156) of thermal oxide is deposited over the entire finFET. This layer is etched away so as to form the sidewall spacers at each reentrant corner formed where a horizontal surface meets a vertical surface. Sidewall spacers (136) inhibit doping of the upper region of source(s) and drain(s) immediately adjacent the gate. Sidewall spacers (140) fill in any undercut regions (144) of BOX layer (116) that may have been formed during prior fabrication steps.

    摘要翻译: 具有侧壁间隔物(136,140)的finFET(100),其用于抑制通道上部区域中的寄生器件,以及源极和漏极的基础,这些器件是用于制造鳍状FET的制造技术的假象 。 FinFET通过蚀刻穿过硬掩模(148)形成在SOI晶片(104)上,以形成独立散热片(120)。 在掺杂源极(124)和漏极(128)之前,在整个finFET上沉积热氧化物层(156)。 该层被蚀刻掉,以便在形成的水平表面与垂直表面相交的每个折入角处形成侧壁间隔物。 侧壁间隔物(136)抑制源极的上部区域和与栅极紧邻的漏极的掺杂。 侧壁间隔物(140)填充可能在先前制造步骤期间形成的BOX层(116)的任何底切区域(144)。

    FinFET transistor and circuit
    9.
    发明授权
    FinFET transistor and circuit 有权
    FinFET晶体管和电路

    公开(公告)号:US07368355B2

    公开(公告)日:2008-05-06

    申请号:US11458250

    申请日:2006-07-18

    IPC分类号: H01L21/336

    摘要: A drive strength tunable FinFET, a method of drive strength tuning a FinFET, a drive strength ratio tuned FinFET circuit and a method of drive strength tuning a FinFET, wherein the FinFET has either at least one perpendicular and at least one angled fin or has at least one double-gated fin and one split-gated fin.

    摘要翻译: 驱动强度可调谐FinFET,FinFET的驱动强度调谐方法,驱动强度比调谐FinFET电路和FinFET的驱动强度调谐方法,其中FinFET具有至少一个垂直和至少一个成角度的鳍或具有 最少一个双门翅和一个分闸门。

    FinFET transistor and circuit
    10.
    发明授权
    FinFET transistor and circuit 有权
    FinFET晶体管和电路

    公开(公告)号:US07115920B2

    公开(公告)日:2006-10-03

    申请号:US10709076

    申请日:2004-04-12

    IPC分类号: H01L27/10

    摘要: A drive strength tunable FinFET, a method of drive strength tuning a FinFET, a drive strength ratio tuned FinFET circuit and a method of drive strength tuning a FinFET, wherein the FinFET has either at least one perpendicular and at least one angled fin or has at least one double-gated fin and one split-gated fin.

    摘要翻译: 驱动强度可调谐FinFET,FinFET的驱动强度调谐方法,驱动强度比调谐FinFET电路和FinFET的驱动强度调谐方法,其中FinFET具有至少一个垂直和至少一个成角度的鳍或具有 最少一个双门翅和一个分闸门。