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    Network processor/software control architecture
    4.
    发明授权
    Network processor/software control architecture 失效
    网络处理器/软件控制架构

    公开(公告)号：US06898179B1

    公开(公告)日：2005-05-24

    申请号：US09544896

    申请日：2000-04-07

    申请人： Brian Mitchell Bass ,  Jean Louis Calvignac ,  Anthony Matteo Gallo ,  Marco C. Heddes ,  Mark Anthony Rinaldi ,  Michael Steven Siegel ,  Colin Beaton Verrilli ,  Fabrice Jean Verplanken

    发明人： Brian Mitchell Bass ,  Jean Louis Calvignac ,  Anthony Matteo Gallo ,  Marco C. Heddes ,  Mark Anthony Rinaldi ,  Michael Steven Siegel ,  Colin Beaton Verrilli ,  Fabrice Jean Verplanken

    IPC分类号： G06F11/00 ,  H04B7/216 ,  H04L1/16 ,  H04L12/26

    CPC分类号： G06F15/17

    摘要： The transport protocol for communicating between general purpose processors acting as contact points and network processors in a packet processing environment such as Ethernet is provided. In such an environment, there is at least one single control point processor (CP) and a plurality of network processors (NP), sometimes referred to as blades. A typical system could contain two to sixteen network processors, and each network processor connects to a plurality of devices which communicate with each other over a network transport, such as Ethernet. The CP typically controls the functionality and the functioning of the network processors to function in a way that connects one end user with another, whether or not the end user is on the same network processor or a different network processor. There are three types of communication provided; first, there is communication generally referred to as control services and normally there will be only one pico processor which operates as a GCH (guided cell handler) and only one that operates as a guided tree handler (GTH). A path is provided for the controls to the GCH and the GTH commands, and a separate path is provided for the data frames between the GDH's (general data handler) and the CP.

    摘要翻译： 提供了用于在诸如以太网的分组处理环境中用作接触点的通用处理器和网络处理器之间进行通信的传输协议。 在这样的环境中，存在至少一个单个控制点处理器（CP）和多个网络处理器（NP），有时称为刀片。 典型的系统可以包含两到十六个网络处理器，并且每个网络处理器连接到通过诸如以太网的网络传输彼此通信的多个设备。 CP通常控制网络处理器的功能和功能，以使终端用户与另一终端用户相连的方式起作用，无论终端用户是否在同一个网络处理器或不同的网络处理器上。 提供三种通讯方式; 首先，通常被称为控制服务的通信，并且通常将只有一个微微处理器作为GCH（引导的单元处理器）操作，并且只有一个作为引导树处理器（GTH）操作。 为GCH和GTH命令的控制提供路径，并为GDH（通用数据处理程序）和CP之间的数据帧提供单独的路径。

    Network processor probing and port mirroring
    5.
    发明授权
    Network processor probing and port mirroring 失效
    网络处理器探测和端口镜像

    公开(公告)号：US06449576B1

    公开(公告)日：2002-09-10

    申请号：US09538247

    申请日：2000-03-29

    申请人： Brian Mitchell Bass ,  Jean Louis Calvignac ,  Anthony Matteo Gallo ,  Marco C. Heddes ,  Michael Steven Siegel ,  Fabrice Jean Verplanken ,  Chad Everett Winemiller

    发明人： Brian Mitchell Bass ,  Jean Louis Calvignac ,  Anthony Matteo Gallo ,  Marco C. Heddes ,  Michael Steven Siegel ,  Fabrice Jean Verplanken ,  Chad Everett Winemiller

    IPC分类号： G01R2728

    CPC分类号： H04L43/50 ,  G01R31/31926

    摘要： A method and system for systematically accessing and monitoring operating parameter signals within an IC device. A probe configuration logic selects a subset of signals from among a set of available signals within a physical or logical subdivision of the IC device. Signal access logic selectively provides physical or logical access from the selected subset of signals within the physical or logical subdivision of the IC device to a probe sensor, such that IC device operations may be flexibly and comprehensively monitored. A local mode selector provides remote access to the selected subset of signals at an input/output (I/O) data interface. Data packaging logic in communication with the probe sensor permits port mirroring of the I/O data interface.

    摘要翻译： 一种用于系统地访问和监视IC设备内的操作参数信号的方法和系统。 探针配置逻辑从IC器件的物理或逻辑细分内的一组可用信号中选择一个信号子集。 信号访问逻辑选择性地从IC器件的物理或逻辑细分中的选定的信号子集提供到探针传感器的物理或逻辑访问，使得可以灵活和全面地监视IC器件操作。 本地模式选择器可在输入/输出（I / O）数据接口上远程访问选定的信号子集。 与探头传感器通信的数据封装逻辑允许端口镜像I / O数据接口。

    Method and apparatus for processing frame classification information between network processors
    6.
    发明授权
    Method and apparatus for processing frame classification information between network processors 失效
    用于处理网络处理器之间帧分类信息的方法和装置

    公开(公告)号：US07106730B1

    公开(公告)日：2006-09-12

    申请号：US09546833

    申请日：2000-04-11

    申请人： Brian Mitchell Bass ,  Jean Louis Calvignac ,  Anthony Matteo Gallo ,  Marco C. Heddes ,  Michael Steven Siegel ,  Fabrice Jean Verplanken

    发明人： Brian Mitchell Bass ,  Jean Louis Calvignac ,  Anthony Matteo Gallo ,  Marco C. Heddes ,  Michael Steven Siegel ,  Fabrice Jean Verplanken

    IPC分类号： H04L12/56

    CPC分类号： H04L49/30

    摘要： A network device including an ingress processor and egress processor which receives frames of data over the network on an input port, and transfers it to an appropriate output port. The received frame is processed by an ingress processor which prepares an intra-switch frame for delivery to an egress processor serving a relevant output port of the switch. The intra-switch frame includes a frame header having parameters which have been determined by the ingress processor, as well as data indicating an address for the egress processor for beginning processing of the frame. By identifying to the egress processor processing which has already taken place, the egress processor is relieved of any redundant processing of the frame. The egress processor provides a hardware frame classifier which decodes the information contained in the intra-frame header to derive parameters which have been previously computed as well as a starting address for the egress processor. By reducing the amount of redundant processing of the egress processor, total device throughput delay is reduced.

    摘要翻译： 一种网络设备，包括入口处理器和出口处理器，其在输入端口上通过网络接收数据帧，并将其传送到适当的输出端口。 接收到的帧由入口处理器处理，入口处理器准备一个内部交换帧，用于传送到服务于交换机的相关输出端口的出口处理器。 帧内切换帧包括具有由入口处理器确定的参数的帧报头，以及指示用于开始处理该帧的出口处理器的地址的数据。 通过识别已经发生的出口处理器处理，出口处理器免除了帧的任何冗余处理。 出口处理器提供硬件帧分类器，其对包含在帧内报头中的信息进行解码以导出先前已经计算的参数以及出口处理器的起始地址。 通过减少出口处理器的冗余处理量，减少了总设备吞吐量延迟。

    Network processor for multiprotocol data flows
    10.
    发明授权
    Network processor for multiprotocol data flows 有权
    用于多协议数据流的网络处理器

    公开(公告)号：US06671280B1

    公开(公告)日：2003-12-30

    申请号：US09535794

    申请日：2000-03-29

    申请人： Brian Mitchell Bass ,  Jean Louis Calvignac ,  Anthony Matteo Gallo ,  Marco C. Heddes ,  Michael Steven Siegel ,  Fabrice Jean Verplanken

    发明人： Brian Mitchell Bass ,  Jean Louis Calvignac ,  Anthony Matteo Gallo ,  Marco C. Heddes ,  Michael Steven Siegel ,  Fabrice Jean Verplanken

    IPC分类号： H04L1256

    CPC分类号： H04L49/30 ,  H04L45/502 ,  H04L49/201 ,  H04L49/251 ,  H04L49/3009 ,  H04L49/602 ,  H04L49/606 ,  H04L2012/5618 ,  H04L2012/5665

    摘要： A method for integrating Asynchronous Transfer Mode (ATM) and frame-based traffic flows within a telecommunications network is disclosed. The telecommunications network includes a network processor having upside processing means for delivering an incoming flow from the telecommunications network to a switch and downside processing means for delivering outgoing network traffic from the switch to the telecommunications network. The incoming flow is initially received at the upside processing means as a frame-based flow. The incoming flow may be characterized as belonging to a group having frame-based flows and ATM flows. In response to the receipt of the incoming flow, the incoming flow is determined if it is destined for a legacy, ATM-only device. The incoming flow is then processed according to the determined routing requirements and the incoming flow characterization before delivering the incoming flow to the switch.

    摘要翻译： 公开了一种在电信网络内集成异步传输模式（ATM）和基于帧的业务流的方法。 电信网络包括具有上行处理装置的网络处理器，用于将来自电信网络的输入流传送到交换机，以及下行处理装置，用于将来自交换机的输出网络业务传送到电信网络。 最初在上行处理装置处接收输入流作为基于帧的流。 输入流可以被表征为属于具有基于帧的流和ATM流的组。 响应于接收到的流入，确定进入流是否发往传统的仅ATM设备。 然后根据确定的路由要求和输入流特性，将传入流量传送到交换机之前处理进入流。