公开(公告)号：US20140079169A1

公开(公告)日：2014-03-20

申请号：US14080733

申请日：2013-11-14

Applicant: Broadcom Corporation

Inventor： Bharath RAGHAVAN ,  Jun CAO ,  Afshin MOMTAZ

IPC: H03K5/07 ,  H04L7/02

CPC classification number: H03K5/07 ,  H03K2005/00071 ,  H03K2005/00208 ,  H03M9/00 ,  H04L7/0079 ,  H04L7/02 ,  H04L7/027 ,  H04L7/033

Abstract: A programmable frequency receiver includes a slicer for receiving data at a first frequency, a de-multiplexer for de-multiplexing the data at a second frequency, a programmable clock generator for generating a clock at the first frequency, and first and second resonant clock amplifiers for amplifying clock signals at the first and second frequencies. The resonant clock amplifiers include an inductor having a low Q value, allowing them to amplify clock signals over the programmable frequency range of the receiver. The second resonant clock amplifier includes digitally tunable delay elements to delay and center the amplified clock signal of the second frequency in the data window at the interface between the slicer and the de-multiplexer. The delay elements can be capacitors. A calibration circuit adjusts capacitive elements within a master clock generator to generate a master clock at the first frequency.

Abstract translation: 可编程频率接收机包括用于以第一频率接收数据的分片器，用于以第二频率解复用数据的解复用器，用于产生第一频率的时钟的可编程时钟发生器，以及第一和第二谐振时钟放大器 用于在第一和第二频率处放大时钟信号。 谐振时钟放大器包括具有低Q值的电感器，允许它们在接收器的可编程频率范围上放大时钟信号。 第二谐振时钟放大器包括数字可调谐延迟元件，以在限幅器和解复用器之间的接口处在数据窗口中延迟和居中放大的第二频率的时钟信号。 延迟元件可以是电容器。 校准电路调整主时钟发生器内的电容元件，以产生第一个频率的主时钟。