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公开(公告)号：US20240333469A1
公开(公告)日：2024-10-03
申请号：US18579609
申请日：2022-06-27
Applicant: AutoNetworks Technologies, Ltd. , Sumitomo Wiring Systems, Ltd. , Sumitomo Electric Industries, Ltd.
Inventor： Tadashi Matsumoto , Kazuki Kitagawa , Kazuyuki Inoue , Yojiro Suyama , Tatsuya Izumi , Hideyuki Tanaka
CPC classification number: H04L7/02 , H04L7/0016
Abstract: An on-vehicle device includes: a storage unit configured to store delay time information indicating at least either a first transmission delay time of data from a measurement reference position of a transmission time of the data in an own device, which is the on-vehicle device, to an external position, or a second transmission delay time of data from an external position to a measurement reference position of a reception time of the data in the own device; and a transmission processing unit configured to transmit the delay time information stored in the storage unit to a first other device that performs time synchronization with the own device.
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公开(公告)号：US20240195598A1
公开(公告)日：2024-06-13
申请号：US18475583
申请日：2023-09-27
Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
Inventor： Hiroshi OTA , Yasuhiro Yamasaki , Kenichiro Hayashi
CPC classification number: H04L7/0016 , H04L7/02
Abstract: The vehicle control system includes an abnormality diagnosis unit for determining whether a synchronization abnormality between a master ECU and a slave ECU has occurred. The abnormality diagnosis unit transmits and receives a signal between the master ECU and the slave ECU and acquires time information. The slave ECU calculates a delay time of transmission based on the acquired time information. Then, the abnormality diagnosis unit first determines whether or not there is a periodic shift. When determining that there is no periodic deviation, the abnormality diagnosis unit determines whether or not there is an offset deviation based on the difference obtained by subtracting the delay time from the second time and the first time. The abnormality diagnosis unit determines that a synchronization abnormality has occurred when it is determined that there is a periodic deviation or when it is determined that there is the offset deviation.
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公开(公告)号：US20240171369A1
公开(公告)日：2024-05-23
申请号：US18550594
申请日：2022-03-10
Applicant: National Research Council of Canada
Inventor： Brent Carlson
Abstract: The present invention provides a method and system to correctly sample, at a central location, a signal at a second clock frequency from a remote antenna when the signal is at a first clock frequency. The present invention provides an improved method of incoherent clocking to correctly sample a signal from a remote antenna at a clock frequency of a central location, such as a central site of a radio telescope array. The signal contains a “tracer” which is related to the frequency of the remote antenna. The tracer phase is written into a dual-port memory at the first clock frequency and then read from the memory at the second clock frequency. The tracer phase is transferred across digital clock domains using Gray-doe methods so that phase coding errors do not occur.
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公开(公告)号：US11962310B1
公开(公告)日：2024-04-16
申请号：US17944215
申请日：2022-09-14
Applicant: Apple Inc.
Inventor： Nir Tishbi , Ilia Benkovitch
CPC classification number: H03L7/0818 , H03L7/091 , H03L7/1075 , H04L7/02 , H04L7/033 , H04L7/0334
Abstract: A receiver includes an interface, a delay line and circuitry. The interface receives data symbols and a clock signal for strobing the data symbols at selected positions. The delay line produces from the clock signal a middle sampling signal, and early and late sampling signals that respectively precedes and succeeds the middle sampling signal. The circuitry samples the data symbols using the middle, early and late sampling signals to produce early and late error signals. Based on the early and late error signals the delay line delays the middle, early and late sampling signals by separate delay values, so as to track both (i) a phase parameter indicative of a deviation between the middle sampling signal and the selected positions of the data symbols, and (ii) a width parameter indicative of a time duration of the data symbols, and to output the data symbols strobed using the middle sampling signal.
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公开(公告)号：US11880839B2
公开(公告)日：2024-01-23
申请号：US17800857
申请日：2021-02-15
Applicant: nChain Licensing AG
Inventor： Andrew James Mee
CPC classification number: G06Q20/401 , G06F9/542 , G06F9/547 , H04L7/02 , G06Q20/36 , G06Q2220/00
Abstract: In a first aspect, the present disclosure proposes methods, devices and systems for implementing a platform providing a plurality of services that are associated with a blockchain, using a platform processor associated with an application programming interface (API) that is capable of receiving a client request in a Hypertext Transfer Protocol (HTTP) transmission protocol format for a service. Further to suitable verification of the identity of the client and/or the request, a destination address or endpoint for the requested blockchain service is determined, and at least one blockchain transaction is generated based on the destination address to obtain an output script. A result based on the output script is then sent to the given client in the HTTP transmission protocol format. In some aspects, the blockchain transaction is associated with an event stream that is implemented as a Finite State Machine on the blockchain.
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Patent Agency Ranking
公开(公告)号：US11831323B2
公开(公告)日：2023-11-28
申请号：US17719974
申请日：2022-04-13
Applicant: Cadence Design Systems, Inc.
Inventor： Marcus Van Ierssel , Prabhnoor Singh Kainth , Nanyan Wang
CPC classification number: H03L7/1075 , H03L7/0807 , H03L7/093 , H04L7/0079 , H04L7/02
Abstract: A clock-and-data recovery circuit for serial receiver includes a jitter meter and an adaptive loop gain adjustment circuitry. The clock-recovery circuitry phase aligns a clock signal to the incoming data. A jitter meter provides a measure of jitter, while adaptation circuitry uses the measure to adjust the clock-recovery circuitry in a manner that reduces clock jitter. The jitter measure can be a ratio of errors associated with different inter-symbol slew rates.
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公开(公告)号：US11699904B2
公开(公告)日：2023-07-11
申请号：US17365520
申请日：2021-07-01
Applicant: Aclara Technologies LLC
Inventor： Christopher Fleck , Roger Smith , Rebecca Ross
Abstract: Systems for determining a phase of a device coupled to an electrical distribution system. The system includes a number of gateway devices configured to transmit a synchronization signal. The gateway device receives a node response message from a first node device that includes a duration value indicating a time between a receipt of the transmitted synchronization signal and a detected zero crossing. The gateway device compares the duration value against duration values received from node devices with a known phase connection and determines a phase of the first node device based on the comparison.
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公开(公告)号：US20180348832A1
公开(公告)日：2018-12-06
申请号：US15972025
申请日：2018-05-04
Applicant: Rambus Inc.
Inventor： Stephen G. Tell
CPC classification number: G06F1/26 , G06F1/10 , G06F12/0246 , G06F13/382 , G06F13/4072 , G06F2212/7201 , G11C7/1072 , H03K19/1776 , H04L7/02
Abstract: Described are a system and method to control interface timing and/or voltage operations of signals transmitted between devices. A processor may be coupled through one or more bus interfaces of a bus to one or more corresponding interface timing and/or voltage comparison circuits and corresponding interface timing and/or voltage adjustment circuits.
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公开(公告)号：US10038548B2
公开(公告)日：2018-07-31
申请号：US15799473
申请日：2017-10-31
Applicant: AVNERA CORPORATION
Inventor： Samuel J. Peters, II , Eric P. Etheridge , Victor Lee Hansen , Alexander C. Stange
CPC classification number: H04L7/033 , G06F13/4295 , H04L7/0029 , H04L7/02
Abstract: A system can include a digital oversampler configured to oversample an input data stream; a rate generator configured to select a frequency that is not less than an expected frequency of the input data stream; a rate generator clock of the rate generator configured to output a clock signal that has the selected frequency; a sample receiver configured to receive at least one sample of the input data stream from the digital oversampler; a sample counter configured to be incremented by each received sample responsive to a determination that the sample receiver has received at least one sample of the input data stream from the digital oversampler; a sample rate converter configured to accumulate samples from the sample receiver at the rate of a “toothless” clock signal, wherein the sample counter is configured to be decremented by the “toothless” clock signal at the selected frequency responsive to a determination that the sample receiver has not received at least one sample of the input data stream from the digital oversampler; and an AND gate configured to pass the “toothless” clock signal to the sample rate converter responsive to a determination that an output of the sample counter is greater than zero.
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公开(公告)号：US20180167645A1
公开(公告)日：2018-06-14
申请号：US15678043
申请日：2017-08-15
Applicant: EVA Automation, Inc.
Inventor： Gaylord Yu , Steven Stupp
IPC: H04N21/233 , H04L29/06 , G06F3/16 , H04N21/8547
CPC classification number: G06F3/165 , G11B27/10 , H04L7/02 , H04L29/06027 , H04L65/60 , H04N21/233 , H04N21/4305 , H04N21/43615 , H04N21/8106 , H04N21/8547 , H04R3/12 , H04R5/04 , H04R27/00 , H04R2420/07 , H04S7/301 , H04S7/303 , H04S7/305 , H04S7/307 , H04S2400/11 , H04S2400/13 , H04S2400/15 , H04W4/023 , H04W56/005
Abstract: An audio/video (A/V) hub that coordinates playback of audio content is described. In particular, the A/V hub may calculate current time offsets between clocks in electronic devices and a clock in the A/V hub based on differences between transmit times of frames from the electronic devices and receive times when the frames were received. For example, the current time offsets may be calculated using wireless ranging by ignoring distances between the A/V hub and the electronic devices. Then, the A/V hub may transmit, to the electronic devices, one or more frames that include audio content and playback timing information, which may specify playback times when the electronic devices are to playback the audio content based on the current time offsets. Furthermore, the playback times of the electronic devices may have a temporal relationship so that the playback of the audio content by the electronic devices is coordinated.
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