公开(公告)号：US09344046B2

公开(公告)日：2016-05-17

申请号：US14144262

申请日：2013-12-30

Applicant: Broadcom Corporation

Inventor： Zhengyu Wang ,  Iuri Mehr ,  Jungwoo Song ,  Xicheng Jiang

IPC: H03F3/217

CPC classification number: H03F3/2175 ,  H03F3/217 ,  H03F2200/351

Abstract: Methods, systems, and apparatuses for detecting and suppressing analog error in an output stage of a digital class-D amplifier are described. In embodiments, the digital class-D amplifier includes a PWM stage, an output stage, and a feedback circuit. The PWM stage receives the signal difference between an input digital signal and a feedback digital signal, generates a digital pulse-width modulated (PWM) signal based thereon, and provides the digital PWM signal as a first component of the digital feedback signal. The output stage receives the digital PWM signal and generates an analog output signal for driving a load responsive to the digital PWM signal. The feedback circuit combines an analog representation of the PWM signal and the analog output signal to generate a second component of the digital feedback signal.

Abstract translation: 描述了用于检测和抑制数字D类放大器的输出级中的模拟错误的方法，系统和装置。 在实施例中，数字D类放大器包括PWM级，输出级和反馈电路。 PWM级接收输入数字信号和反馈数字信号之间的信号差，基于此产生数字脉宽调制（PWM）信号，并提供数字PWM信号作为数字反馈信号的第一分量。 输出级接收数字PWM信号，并产生用于响应于数字PWM信号驱动负载的模拟输出信号。 反馈电路组合了PWM信号和模拟输出信号的模拟表示，以产生数字反馈信号的第二分量。

公开(公告)号：US20150180430A1

公开(公告)日：2015-06-25

申请号：US14144262

申请日：2013-12-30

Applicant: Broadcom Corporation

Inventor： Zhengyu Wang ,  Iuri Mehr ,  Jungwoo Song ,  Xicheng Jiang

IPC: H03F3/217

CPC classification number: H03F3/2175 ,  H03F3/217 ,  H03F2200/351

Abstract: Methods, systems, and apparatuses for detecting and suppressing analog error in an output stage of a digital class-D amplifier are described. In embodiments, the digital class-D amplifier includes a PWM stage, an output stage, and a feedback circuit. The PWM stage receives the signal difference between an input digital signal and a feedback digital signal, generates a digital pulse-width modulated (PWM) signal based thereon, and provides the digital PWM signal as a first component of the digital feedback signal. The output stage receives the digital PWM signal and generates an analog output signal for driving a load responsive to the digital PWM signal. The feedback circuit combines an analog representation of the PWM signal and the analog output signal to generate a second component of the digital feedback signal.

Abstract translation: 描述了用于检测和抑制数字D类放大器的输出级中的模拟错误的方法，系统和装置。 在实施例中，数字D类放大器包括PWM级，输出级和反馈电路。 PWM级接收输入数字信号和反馈数字信号之间的信号差，基于此产生数字脉宽调制（PWM）信号，并提供数字PWM信号作为数字反馈信号的第一分量。 输出级接收数字PWM信号，并产生用于响应于数字PWM信号驱动负载的模拟输出信号。 反馈电路组合了PWM信号和模拟输出信号的模拟表示，以产生数字反馈信号的第二分量。