公开(公告)号：US20150180430A1

公开(公告)日：2015-06-25

申请号：US14144262

申请日：2013-12-30

Applicant: Broadcom Corporation

Inventor： Zhengyu Wang ,  Iuri Mehr ,  Jungwoo Song ,  Xicheng Jiang

IPC: H03F3/217

CPC classification number: H03F3/2175 ,  H03F3/217 ,  H03F2200/351

Abstract: Methods, systems, and apparatuses for detecting and suppressing analog error in an output stage of a digital class-D amplifier are described. In embodiments, the digital class-D amplifier includes a PWM stage, an output stage, and a feedback circuit. The PWM stage receives the signal difference between an input digital signal and a feedback digital signal, generates a digital pulse-width modulated (PWM) signal based thereon, and provides the digital PWM signal as a first component of the digital feedback signal. The output stage receives the digital PWM signal and generates an analog output signal for driving a load responsive to the digital PWM signal. The feedback circuit combines an analog representation of the PWM signal and the analog output signal to generate a second component of the digital feedback signal.

Abstract translation: 描述了用于检测和抑制数字D类放大器的输出级中的模拟错误的方法，系统和装置。 在实施例中，数字D类放大器包括PWM级，输出级和反馈电路。 PWM级接收输入数字信号和反馈数字信号之间的信号差，基于此产生数字脉宽调制（PWM）信号，并提供数字PWM信号作为数字反馈信号的第一分量。 输出级接收数字PWM信号，并产生用于响应于数字PWM信号驱动负载的模拟输出信号。 反馈电路组合了PWM信号和模拟输出信号的模拟表示，以产生数字反馈信号的第二分量。

公开(公告)号：US20150066438A1

公开(公告)日：2015-03-05

申请号：US14473635

申请日：2014-08-29

Applicant: BROADCOM CORPORATION

Inventor： Todd Lee Brooks ,  Xicheng Jiang ,  Iuri Mehr ,  David Joseph Stoops ,  Vinod Jayakumar ,  Min Gyu Kim ,  Hui Zheng ,  I-Ning Ku ,  Vinay Chandrasekhar ,  Yee Ling Cheung

IPC: H03B5/04 ,  G01R19/00 ,  G01K1/00 ,  G01L7/00 ,  A61B5/021 ,  H05B33/08 ,  A61B5/01 ,  A61B5/024 ,  A61B5/08 ,  G01J1/00 ,  G01N33/00

CPC classification number: H05B33/089 ,  A61B5/01 ,  A61B5/021 ,  A61B5/024 ,  A61B5/0816 ,  A61B2562/06 ,  G01J1/44 ,  G01K1/02 ,  G01R19/0092 ,  H03K3/0231

Abstract: A sensor interface includes on-chip relaxation oscillator circuit and a PLL that operate cooperatively to generate a highly accurate clock signal on-chip using low-power components. A photodiode generates a current signal based on an optical signal that is representative of a sensor signal. An ADC that operates based on the highly accurate clock signal generates a digital signal based on the current signal generated by the photodiode, and a processor processed the digital signal to estimate sensor data within the sensor signal. Examples of characteristics that may be sensed can include environmental characteristics (e.g., temperature, humidity, barometric pressure, etc.) and/or biomedical characteristics (e.g., body temperature, heart rate, respiratory rate, blood pressure, etc.). In desired, an amplifier processes the photodiode-provided current signal before it is provided to the ADC. Also, one or more CDACs that generate feedback currents may be used to reduce noise sensitivity of the sensor interface.

Abstract translation: 传感器接口包括片上弛豫振荡器电路和PLL，其协作地工作以使用低功率元件在片上产生高精度的时钟信号。 光电二极管基于表示传感器信号的光信号产生电流信号。 基于高度精确的时钟信号操作的ADC基于由光电二极管产生的电流信号产生数字信号，并且处理器处理数字信号以估计传感器信号内的传感器数据。 可以感测的特征的实例可以包括环境特征（例如，温度，湿度，大气压力等）和/或生物医学特征（例如体温，心率，呼吸频率，血压等）。 在期望的情况下，放大器在将其提供给ADC之前处理提供的光电二极管的电流信号。 而且，可以使用产生反馈电流的一个或多个CDAC来降低传感器接口的噪声灵敏度。

公开(公告)号：US20150008982A1

公开(公告)日：2015-01-08

申请号：US14042274

申请日：2013-09-30

Applicant: Broadcom Corporation

Inventor： Kuo-J Huang ,  Delong Cui ,  Jun Cao ,  Afshin Doctor Momtaz ,  Iuri Mehr ,  Ramon Alejandro Gomez

IPC: H03F1/32

CPC classification number: H03F1/3205 ,  H03F1/3211 ,  H03F1/3241 ,  Y10T29/49016

Abstract: Techniques are described herein that adaptively suppress harmonic distortion in an amplifier utilizing negative gain. The amplifier includes a first amplifier stage and a second amplifier stage, which are coupled in parallel. The first amplifier stage has a positive gain. The second amplifier stage has a negative gain to suppress total harmonic distortion of a system that includes the amplifier. The amplifier further includes shunt-peaking circuitry coupled to the first amplifier stage and the second amplifier stage to increase a maximum operating frequency at which the amplifier is capable of operating.

Abstract translation: 这里描述了利用负增益自适应地抑制放大器中的谐波失真的技术。 放大器包括并联耦合的第一放大级和第二放大级。 第一个放大器级具有正增益。 第二放大器级具有负增益以抑制包括放大器的系统的总谐波失真。 放大器还包括耦合到第一放大器级和第二放大器级的并联峰值电路，以增加放大器能够操作的最大工作频率。

公开(公告)号：US09344046B2

公开(公告)日：2016-05-17

申请号：US14144262

申请日：2013-12-30

Applicant: Broadcom Corporation

Inventor： Zhengyu Wang ,  Iuri Mehr ,  Jungwoo Song ,  Xicheng Jiang

IPC: H03F3/217

CPC classification number: H03F3/2175 ,  H03F3/217 ,  H03F2200/351

Abstract: Methods, systems, and apparatuses for detecting and suppressing analog error in an output stage of a digital class-D amplifier are described. In embodiments, the digital class-D amplifier includes a PWM stage, an output stage, and a feedback circuit. The PWM stage receives the signal difference between an input digital signal and a feedback digital signal, generates a digital pulse-width modulated (PWM) signal based thereon, and provides the digital PWM signal as a first component of the digital feedback signal. The output stage receives the digital PWM signal and generates an analog output signal for driving a load responsive to the digital PWM signal. The feedback circuit combines an analog representation of the PWM signal and the analog output signal to generate a second component of the digital feedback signal.

Abstract translation: 描述了用于检测和抑制数字D类放大器的输出级中的模拟错误的方法，系统和装置。 在实施例中，数字D类放大器包括PWM级，输出级和反馈电路。 PWM级接收输入数字信号和反馈数字信号之间的信号差，基于此产生数字脉宽调制（PWM）信号，并提供数字PWM信号作为数字反馈信号的第一分量。 输出级接收数字PWM信号，并产生用于响应于数字PWM信号驱动负载的模拟输出信号。 反馈电路组合了PWM信号和模拟输出信号的模拟表示，以产生数字反馈信号的第二分量。

公开(公告)号：US09756699B2

公开(公告)日：2017-09-05

申请号：US14473635

申请日：2014-08-29

Applicant: BROADCOM CORPORATION

Inventor： Todd Lee Brooks ,  Xicheng Jiang ,  Iuri Mehr ,  David Joseph Stoops ,  Vinod Jayakumar ,  Min Gyu Kim ,  Hui Zheng ,  I-Ning Ku ,  Vinay Chandrasekhar ,  Yee Ling Cheung

IPC: H04B15/00 ,  H05B33/08 ,  G01R19/00 ,  H03K3/0231 ,  G01K1/02 ,  A61B5/01 ,  A61B5/024 ,  A61B5/08 ,  A61B5/021 ,  G01J1/44

CPC classification number: H05B33/089 ,  A61B5/01 ,  A61B5/021 ,  A61B5/024 ,  A61B5/0816 ,  A61B2562/06 ,  G01J1/44 ,  G01K1/02 ,  G01R19/0092 ,  H03K3/0231

Abstract: A sensor interface includes on-chip relaxation oscillator circuit and a PLL that operate cooperatively to generate a highly accurate clock signal on-chip using low-power components. A photodiode generates a current signal based on an optical signal that is representative of a sensor signal. An ADC that operates based on the highly accurate clock signal generates a digital signal based on the current signal generated by the photodiode, and a processor processed the digital signal to estimate sensor data within the sensor signal. Examples of characteristics that may be sensed can include environmental characteristics (e.g., temperature, humidity, barometric pressure, etc.) and/or biomedical characteristics (e.g., body temperature, heart rate, respiratory rate, blood pressure, etc.). If desired, an amplifier processes the photodiode-provided current signal before it is provided to the ADC. Also, one or more CDACs that generate feedback currents may be used to reduce noise sensitivity of the sensor interface.

公开(公告)号：US20160204702A1

公开(公告)日：2016-07-14

申请号：US14640893

申请日：2015-03-06

Applicant: Broadcom Corporation

Inventor： Aravind Kumar PADYANA ,  Iuri Mehr ,  Jay Ackerman ,  Mark Rutherford ,  Daniel Melendy ,  Eric Martin Hayes

IPC: H02M3/158

CPC classification number: H02M3/1563 ,  H02M1/15 ,  H02M2001/0022

Abstract: A hysteretic switching regulator with low output ripple voltage is disclosed herein. A detector and controller is specifically used to adjust a parameter of the hysteretic switching regulator to compensate for changes in one or more of input voltage and desired output voltage to maintain the output ripple voltage within some desired range.

Abstract translation: 本文公开了具有低输出纹波电压的迟滞开关调节器。 检测器和控制器专门用于调整滞后开关调节器的参数以补偿输入电压和期望输出电压中的一个或多个的变化，以将输出纹波电压保持在一定的期望范围内。

公开(公告)号：US09136797B2

公开(公告)日：2015-09-15

申请号：US14042274

申请日：2013-09-30

Applicant: Broadcom Corporation

Inventor： Kuo-J Huang ,  Delong Cui ,  Jun Cao ,  Afshin Doctor Momtaz ,  Iuri Mehr ,  Ramon Alejandro Gomez

IPC: H03F3/45 ,  H03F1/32

CPC classification number: H03F1/3205 ,  H03F1/3211 ,  H03F1/3241 ,  Y10T29/49016

Abstract: Techniques are described herein that adaptively suppress harmonic distortion in an amplifier utilizing negative gain. The amplifier includes a first amplifier stage and a second amplifier stage, which are coupled in parallel. The first amplifier stage has a positive gain. The second amplifier stage has a negative gain to suppress total harmonic distortion of a system that includes the amplifier. The amplifier further includes shunt-peaking circuitry coupled to the first amplifier stage and the second amplifier stage to increase a maximum operating frequency at which the amplifier is capable of operating.

Abstract translation: 这里描述了利用负增益自适应地抑制放大器中的谐波失真的技术。 放大器包括并联耦合的第一放大级和第二放大级。 第一个放大器级具有正增益。 第二放大器级具有负增益以抑制包括放大器的系统的总谐波失真。 放大器还包括耦合到第一放大器级和第二放大器级的并联峰值电路，以增加放大器能够操作的最大工作频率。