公开(公告)号：US20170125439A1

公开(公告)日：2017-05-04

申请号：US15223255

申请日：2016-07-29

申请人： CHANG-MIN CHOI ,  JU-YOUNG LIM ,  SU-JIN AHN

发明人： CHANG-MIN CHOI ,  JU-YOUNG LIM ,  SU-JIN AHN

IPC分类号： H01L27/115 ,  H01L23/528

CPC分类号： H01L27/11582 ,  H01L23/5283 ,  H01L27/0688 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11578

摘要： A vertical memory device includes a substrate, a plurality of channels extending in a first direction substantially vertical to a top surface of the substrate, a plurality of gate lines surrounding a predetermined number of channels from among the channels, a plurality of common wirings electrically connected to the gate lines, and a plurality of signal wirings electrically connected to the gate lines via the common wirings. The gate lines are arranged and spaced apart from one another along the first direction. Each common wiring is electrically connected to a corresponding gate line at a same level of the corresponding gate line via a corresponding contact.