公开(公告)号：US12114483B2

公开(公告)日：2024-10-08

申请号：US17605011

申请日：2021-07-28

Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.

Inventor： Dandan He

IPC: H10B12/00

CPC classification number: H10B12/482 ,  H10B12/02

Abstract: The present application provides a method for manufacturing a semiconductor device, and a semiconductor device. The method includes: providing a substrate; forming a first conductive material layer on the substrate; performing plasma treatment on the first conductive material layer to form a first conductive layer; successively forming a second conductive layer, a first block layer, a third conductive layer and a fourth conductive layer on the first conductive layer; forming a dielectric layer on the fourth conductive layer, and forming an ohmic contact layer at a junction of the first conductive layer and the second conductive layer; forming an initial bit line structure; performing NH3/N2 plasma treatment on the initial bit line structure to form a second block layer on a sidewall of the first conductive layer and a third block layer on a sidewall of the ohmic contact layer.