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公开(公告)号：US20220399379A1
公开(公告)日：2022-12-15
申请号：US17621176
申请日：2020-12-18
发明人： Wentao WANG , Dawei SHI , Pei WANG , Dongsheng ZHAO , Lu YANG , Liang HUO , Cenhong DUAN , Can HUANG , Xiaosong WEN
IPC分类号： H01L27/12 , G09G3/3233
摘要： A driving backplane includes: a base; a first conductive layer disposed on the base, the first conductive layer including at least one first signal line; a first insulating layer disposed on a side of the first conductive layer away from the base; a second conductive layer disposed on a side of the first insulating layer away from the first conductive layer, the second conductive layer including at least one second signal line. Each first signal line and a second signal line constitute a signal line pair. In the signal line pair, extending directions of the first signal line and the second signal line are the same, an orthogonal projection of the first signal line on the base and an orthogonal projection of the second signal line on the base have a first overlapping region, and the second signal line is coupled to the first signal line.
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公开(公告)号：US20210074778A1
公开(公告)日：2021-03-11
申请号：US16934040
申请日：2020-07-21
发明人： Xu LI , Dawei SHI , Lu YANG , Wentao WANG , Cenhong DUAN , Can HUANG , Bangwei WU , Pei WANG
IPC分类号： H01L27/32 , G02F1/167 , G02F1/16766 , G02F1/1677
摘要： Provided are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a first display region and a second display region within the first display region, wherein the first display region includes a plurality of emitting units, and the second display region includes a plurality of electrophoretic units, the plurality of emitting units are configured to realize display, and the plurality of electrophoretic units are configured to realize switch between a display state and a transparent state.
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公开(公告)号：US20210028251A1
公开(公告)日：2021-01-28
申请号：US16848151
申请日：2020-04-14
发明人： Lu YANG , Dawei SHI , Wentao WANG , Cenhong DUAN , Pei WANG , Xu LI , Can HUANG , Bangwei WU
摘要： The present disclosure provides an OLED display substrate, a fabricating method thereof and a display device. The OLED display substrate includes a substrate; an inorganic layer and a light-emitting unit on substrate, light-emitting unit being on a side of inorganic layer away from substrate and including a light-emitting structure; a camera. on a side of substrate away from inorganic layer, and light-emitting unit being not in orthographic projection region; a protective layer in orthographic projection region and on side of inorganic layer away from substrate, wherein protective layer is configured to protect inorganic layer in orthographic projection region from warping or cracking in a process of removing part of light-emitting structure in orthographic projection region by laser cutting.
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公开(公告)号：US20210373689A1
公开(公告)日：2021-12-02
申请号：US16471393
申请日：2018-12-04
发明人： Cenhong DUAN , Dawei SHI , Fengguo WANG , Feng LI , Hong LIU , Xinguo WU , Lu YANG , Wentao WANG , Zifeng WANG , Bo MA , Yuanbo LI , Zhixuan GUO , Jing ZHAO , Haiqin LIANG
摘要： An array substrate, a method for fabricating the same, and a display device are provided. The array substrate includes: a base substrate; touch electrode wiring including a first conductive layer and a second conductive layer, where the first conductive layer is between the base substrate and the second conductive layer, the second conductive layer includes at least one first via hole to expose the first conductive layer, and the first conductive layer has a higher electrical conductivity than that of the second conductive layer; a planarization layer on the second conductive layer, where the planarization layer includes at least one first touch electrode contact hole; and touch electrode on the planarization layer, where the touch electrode is connected with the first conductive layer through the first touch electrode contact hole and the first via hole.
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5.发明申请公开(公告)号：US20190123156A1
公开(公告)日：2019-04-25
申请号：US16122339
申请日：2018-09-05
发明人： Xinguo WU , Fengguo WANG , Dawei SHI , Hong LIU , Zifeng WANG , Feng LI , Bo MA , Zhixuan GUO , Yuanbo LI , Cenhong DUAN , Jing ZHAO
IPC分类号： H01L29/417 , H01L29/786 , G02F1/1362 , H01L27/12
摘要： The present application provides a thin film transistor, an array substrate, a display device and a method of fabricating a thin film transistor. According to embodiments of the present application, the thin film transistor includes: a substrate; a first source/drain electrode on the substrate; an active layer at a side of the first source/drain electrode facing away from the substrate; and a second source/drain electrode at a side of the active layer facing away from the first source/drain electrode. The first source/drain electrode and the second source/drain electrode are electrically connected to the active layer independently.
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6.发明申请公开(公告)号：US20190121477A1
公开(公告)日：2019-04-25
申请号：US16157227
申请日：2018-10-11
发明人： Xinguo WU , Fengguo WANG , Dawei SHI , Hong LIU , Feng LI , Zifeng WANG , Bo MA , Zhixuan GUO , Yuanbo LI , Cenhong DUAN , Jing ZHAO
摘要： An array substrate and a method for manufacturing the same, a display panel and a display device are provided. The array substrate includes: a substrate; a gate metal layer arranged on the substrate, the gate metal layer including a gate line and a patterned auxiliary metal; a source and drain metal layer, the source and drain metal layer including source signal lines and touch signal lines, and the source and drain metal layer being separated from the gate metal layer by an insulating layer; a planarization layer arranged on the source and drain metal layer; and a common electrode arranged on the planarization layer. The patterned auxiliary metal is electrically connected to the touch signal lines through first holes penetrating the insulating layer, and is electrically connected to the common electrode through second holes penetrating the insulating layer and third holes penetrating the planarization layer.
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公开(公告)号：US20210333968A1
公开(公告)日：2021-10-28
申请号：US16473718
申请日：2018-11-30
发明人： Xinguo WU , Fengguo WANG , Dawei SHI , Hong LIU , Zifeng WANG , Feng LI , Bo MA , Zhixuan GUO , Yuanbo LI , Cenhong DUAN , Jing ZHAO
IPC分类号： G06F3/041
摘要： The present disclosure provides an array substrate and a manufacturing method thereof, and a display device. The array substrate includes a display area and a peripheral circuit area. The array substrate further includes a plurality of touch electrodes located in the display area; a plurality of touch signal lines connecting the plurality of touch electrodes to the peripheral circuit area; a plurality of first conductor lines extending in a same direction as the plurality of touch signal lines; and a plurality of second conductor lines extending in a different direction from the plurality of touch signal lines.
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公开(公告)号：US20200185416A1
公开(公告)日：2020-06-11
申请号：US16631524
申请日：2018-08-06
发明人： Xinguo WU , Fengguo WANG , Dawei SHI , Hong LIU , Zifeng WANG , Feng LI , Bo MA , Zhixuan GUO , Yuanbo LI , Jing ZHAO , Cenhong DUAN , Haiqin LIANG
摘要： An array substrate is provided. The array substrate include a base, a first electrode and a second electrode which are on the base and a touch line on the base, both the first electrode and the second electrode are configured to transmit a display signal, the touch line is configured to transmit a touch signal; the first electrode and the touch line are respectively in different layers, and an orthographic projection of the first electrode on the base at least partially overlaps with an orthographic projection of the touch line on the base. A preparation method of the array substrate and a touch display panel are further provided.
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公开(公告)号：US20190056630A1
公开(公告)日：2019-02-21
申请号：US16001646
申请日：2018-06-06
发明人： Hong LIU , Fengguo WANG , Dawei SHI , Zifeng WANG , Xinguo WU , Bo MA , Feng LI , Yuanbo LI , Zhixuan GUO , Cenhong DUAN , Jing ZHAO
IPC分类号： G02F1/1362 , G02F1/1368 , H01L27/12 , H01L21/285 , G02F1/1335 , H05K9/00
摘要： A display device is provided, including an array substrate and an opposite substrate, a fan-out gate array formed on the array substrate and a transparent conductive material layer overlying the fan-out gate array; and a fan-out region formed on the opposite substrate and a base layer formed on the fan-out region.
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