公开(公告)号：US20240304720A1

公开(公告)日：2024-09-12

申请号：US18576942

申请日：2022-12-14

申请人： CSMC TECHNOLOGIES FAB2 CO., LTD.

发明人： Huajun JIN ,  Liang SONG ,  Yongshun LI ,  Mei YUAN ,  Yanan WANG ,  Lin LUO ,  Qiang ZHANG

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L29/66

CPC分类号： H01L29/7816 ,  H01L29/0603 ,  H01L29/66681

摘要： The present disclosure involves a semiconductor device and a manufacturing method thereof. A second well region is inserted between first well regions of a semiconductor device to improve the breakdown voltage of the device, and at the same time, the dimension of the upper surface of the second well region in the width direction of the device's conductive channel is set to be smaller than the dimension of the lower surface of the second well region in the width direction of the device's conductive channel to increase the dimension of the upper surface of the adjacent first well region in the width direction of the device's conductive channel. That is, the path width of the current flowing through the upper surface of the drift region is increased when the device is on, and thus the device's on-resistance is reduced.