SEMICONDUCTOR DEVICE AND PREPARATION METHOD THEREFOR

    公开(公告)号:US20240304720A1

    公开(公告)日:2024-09-12

    申请号:US18576942

    申请日:2022-12-14

    IPC分类号: H01L29/78 H01L29/06 H01L29/66

    摘要: The present disclosure involves a semiconductor device and a manufacturing method thereof. A second well region is inserted between first well regions of a semiconductor device to improve the breakdown voltage of the device, and at the same time, the dimension of the upper surface of the second well region in the width direction of the device's conductive channel is set to be smaller than the dimension of the lower surface of the second well region in the width direction of the device's conductive channel to increase the dimension of the upper surface of the adjacent first well region in the width direction of the device's conductive channel. That is, the path width of the current flowing through the upper surface of the drift region is increased when the device is on, and thus the device's on-resistance is reduced.

    SUPER-ß BIPOLAR JUNCTION TRANSISTOR AND MANUFACTURING METHOD THEREFOR

    公开(公告)号:US20240006477A1

    公开(公告)日:2024-01-04

    申请号:US18254986

    申请日:2022-07-22

    摘要: A manufacturing method for a super-β bipolar junction transistor includes providing a substrate, and forming a first conductive type isolation buried layer and a first conductive type doped layer based on the substrate. The isolation buried layer is located at a bottom of the doped layer. The method also includes forming a second conductive type base region in the doped layer and forming a second conductive type doped island on a peripheral side of the base region. A doping concentration of the doped island is greater than that of the base region. Additionally, the method includes forming a first conductive type collector region in the doped layer, and the collector region is spaced from the base region. Further, the method includes forming a first conductive type emitter region in the base region.