公开(公告)号：US09696371B2

公开(公告)日：2017-07-04

申请号：US14759370

申请日：2013-12-31

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Ming Wang ,  Xiaoqian Lian ,  Yaojun Lin ,  Wenhui Xu ,  Hanshun Chen

IPC: G01R31/02 ,  G01R31/26

CPC classification number: G01R31/2621 ,  G01R31/2623

Abstract: A test method and system for cut-in voltage. The method comprises: coarse scanning of the cut-in voltage: a grid voltage, i.e., the cut-in voltage, is quickly determined when a drain terminal current is greater than a target current for the first time (100); accurate scanning of the cut-in voltage: a scanning step length is shortened continuously until the scanning step length is shorter than a preset step length, and each time the scanning step length is shortened, the scanning is conducted according to the current shortened scanning step length on the basis of the cut-in voltage determined in the former time, and then the cut-in voltage under the condition of the current shortened scanning step length is determined again (200). The scanning voltage is automatically increased or decreased by the test method and system through adding high resolution and high precision test conversion into a second scanning test, and therefore the testing of the cut-in voltage becomes more efficient and more accurate.