公开(公告)号：US10586011B1

公开(公告)日：2020-03-10

申请号：US15928627

申请日：2018-03-22

Applicant: Cadence Design Systems, Inc.

Inventor： Dennis Nagle ,  Amit Kumar Sharma ,  Delong Cai ,  Xuegang Zeng ,  Hui Qi

IPC: G06F17/50

Abstract: Embodiments include herein are directed towards a method for electronic circuit design. Embodiments may include displaying, at a graphical user interface, an electronic circuit design topology environment and allowing a user to select, create, or modify an entirely single pin topology, an entirely multi-pin topology, or a combination of a single pin topology and a multi-pin topology for one or more portions of the electronic circuit design topology environment. Embodiments may also include receiving a selection of a designated portion of the electronic circuit design topology environment and generating, at the graphical user interface, a first, pin-adjustable symbol in accordance with the selected topology at the designated portion.