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公开(公告)号:US10222417B1
公开(公告)日:2019-03-05
申请号:US15362413
申请日:2016-11-28
发明人: Akhil Garg , Dale Meehl , Sahil Jain
IPC分类号: G01R31/3177 , G06F1/08 , H04L9/10 , G01R31/317 , G01R31/3185 , G01R31/3183 , G01R31/3181 , G06F17/50 , G11C7/24 , G06F11/25 , G11C29/32
摘要: Embodiments relate to providing security of scan mode access and data in an integrated circuit. In embodiments, one or both of two layers of security are provided. A first layer includes requiring a complex initialization sequence to be performed in order to access scan mode. A second layer includes scrambling the scan data before it is output from the circuit under test, which prevents unauthorized persons from extracting useful information from the output scan data. Further embodiments relate to methodologies for utilizing these protection layers after manufacture of the integrated circuit and incorporating these protection layers in an integrated circuit design flow.
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公开(公告)号:US10747922B1
公开(公告)日:2020-08-18
申请号:US15956573
申请日:2018-04-18
发明人: Akhil Garg , Sahil Jain , Vivek Chickermane
IPC分类号: G06F30/33 , G01R31/28 , G06F30/333
摘要: A test circuit includes a plurality of codec logic elements arranged in a plurality of annular rings on an integrated circuit, each codec logic element configured to provide test bits to one or more respective scan chain and receive test result bits from the one or more respective scan chain. The test circuit further includes a decompressor logic arranged along at least one annular ring of the plurality of annular rings on the integrated circuit, the decompressor logic configured to provide test bits to at least one codec logic element in each annular ring. The test circuit also includes a compressor logic arranged transversely with respect to the plurality of annular rings on the integrated circuit, the compressor logic configured to receive test result bits from at least one of the plurality of codec logic elements.
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