公开(公告)号：US10789406B1

公开(公告)日：2020-09-29

申请号：US16193803

申请日：2018-11-16

Applicant: Cadence Design Systems, Inc.

Inventor： Shiva Raja ,  Igor Keller ,  Ling Wang

IPC: G06F30/3323 ,  G06F30/30 ,  G06F30/367 ,  G06F30/3312 ,  G06F111/04 ,  G06F111/10 ,  G06F111/20 ,  G06F119/12

Abstract: The present embodiments are generally directed to electronic circuit design and verification and more particularly to techniques for characterizing electronic components within an electronic circuit design for use in verification. In one or more embodiments, an adaptive sensitivity based analysis is used to build an adaptive equation to represent the timing response surface for an electronic component. With the adaptive surface response built, a sample-based evaluation yields highly accurate extraction of electronic component timing parameters including on-chip variation information such as sigma and moments.