公开(公告)号：US10789406B1

公开(公告)日：2020-09-29

申请号：US16193803

申请日：2018-11-16

Applicant: Cadence Design Systems, Inc.

Inventor： Shiva Raja ,  Igor Keller ,  Ling Wang

IPC: G06F30/3323 ,  G06F30/30 ,  G06F30/367 ,  G06F30/3312 ,  G06F111/04 ,  G06F111/10 ,  G06F111/20 ,  G06F119/12

Abstract: The present embodiments are generally directed to electronic circuit design and verification and more particularly to techniques for characterizing electronic components within an electronic circuit design for use in verification. In one or more embodiments, an adaptive sensitivity based analysis is used to build an adaptive equation to represent the timing response surface for an electronic component. With the adaptive surface response built, a sample-based evaluation yields highly accurate extraction of electronic component timing parameters including on-chip variation information such as sigma and moments.

公开(公告)号：US09594858B1

公开(公告)日：2017-03-14

申请号：US14494433

申请日：2014-09-23

Applicant: Cadence Design Systems, Inc.

Inventor： Hing Key Kenneth Tseng ,  Ling Wang ,  Shuilong Chen

IPC: G06F17/50

CPC classification number: G06F17/5031 ,  G06F17/504 ,  G06F17/5081 ,  G06F2217/84

Abstract: Various embodiments scalable statistical library characterization for electronic designs by identifying an electronic design, performing circuit simulations on strongly connected components on a component-by-component basis, performing the logic cone analysis on the entire electronic design, and performing combinations of influences on the electronic design caused by variations of parameters. Some embodiments perform simulations on one or more stronger parameters or the strongest parameter of a circuit component and use the simulation results to calibrate the predicted behaviors of one or more remaining circuit components of the electronic design. Various statistical or mathematical techniques may be used for performing the combinations of influences on the electronic design caused by variations of parameters. The techniques described are scalable with the increase in complexities and sizes of electronic designs while reducing or minimizing the impact on sensitivity accuracy.

Abstract translation: 各种实施例通过识别电子设计来对电子设计进行可扩展的统计库表征，在逐个组件的基础上对强连接的组件执行电路仿真，对整个电子设计执行逻辑锥分析，以及对电子设备进行影响的组合 由参数变化引起的设计。 一些实施例对一个或多个更强的参数或电路组件的最强参数进行模拟，并使用模拟结果校准电子设计的一个或多个剩余电路组件的预测行为。 可以使用各种统计或数学技术来执行由参数变化引起的对电子设计的影响的组合。 所描述的技术随着电子设计的复杂性和尺寸的增加而可扩展，同时减少或最小化对灵敏度精度的影响。