公开(公告)号：US10285276B1

公开(公告)日：2019-05-07

申请号：US15275230

申请日：2016-09-23

Applicant: Cadence Design Systems, Inc.

Inventor： Taranjit Kukal ,  Arnold Ginetti ,  Steven R. Durrill ,  Abhay Agarwal ,  Vikas Kohli ,  Tyler Lockman

IPC: G06F11/22 ,  G06F17/50 ,  H05K3/00

Abstract: A method is provided that includes receiving shape data specifying a shape of an electromagnetic (EM) structure in a circuit layout and transferring the shape data to a schematic cell representation based on a logic function of the EM structure and package technology layers of the circuit layout. The method includes placing a symbol for the EM structure in the schematic cell representation, associating the shape data and a model path with a cell parameter in the symbol, mapping the shape data to the package technology layers, and specifying pins in the schematic cell representation according to the shape data. Further, the method includes verifying ports for the EM structure and placing the EM structure in a package layout for a printed circuit board (PCB). A system and a non-transitory, computer readable medium storing commands to perform the above method are also provided.